Hi, I compile .c files using both gcc.3.4.6 and gcc-4.3.2 chaining to Sun's
assembler "Sun Compiler Common 10 Patch 09/04/2007" in both cases:
gcc -O3 -D_SOLARIS -D_SPARC -Wall -Wa,-xarch=v8plus -fexceptions -c ...
I run on a "SunOS 5.10 Generic_137111-08 sun4v sparc SUNW,T5240" box with
16x1582MHz (UltraSPARC-T2+) procesors. The gcc.3.4.6 build works. The gcc-4.3.2
cores with a BUS error.
How can I turn pseudo assembler instructions off and/or what switch can I add
to the gcc line to make this BUS error go away? Either the assembler is wrong
and/or gcc aligned a variable on the wrong boundary. Details follow.
==========
The key difference appears to be that 3.4.6 does not emit pseudo instructions
which work on extended 8-byte words. 4.3.2 does. In this case 4.3.2 emits stx
which is output as clrx i.e. appears in objdump of the .o file. That particular
code fragment is the assembler equivalent of "tm->counter = 0" except counter
is on a 4-byte boundary hence bus error:
.align 4
.global init
.type init, #function
.proc 012
init:
.LLFB4:
save %sp, -112, %sp
.LLCFI9:
st %g0, [%i0+28]
st %g0, [%i0+32]
mov -1, %g1
st %g0, [%i0+36]
stx %g0, [%i0+56] <- BUS ERROR HERE. 8 byte operation
mov %i1, %o0 on memory on a non-8 byte boundary
st %g0, [%i0+40]
add %i0, 44, %o1
call init_helper, 0
st %g1, [%i0+48]
cmp %o0, 0
bne,pt %icc, .LL112
sethi %hi(369664), %o0
call stop, 0
or %o0, 399, %o0
.LL112:
return %i7+8
Contrast with the 3.4.6 output:
.align 4
.global init
.type init, #function
.proc 012
init:
.LLFB4:
!#PROLOGUE# 0
save %sp, -112, %sp
.LLCFI0:
!#PROLOGUE# 1
st %g0, [%i0+28]
st %g0, [%i0+32]
st %g0, [%i0+36]
mov 0, %o4 <- no stx: this works
mov 0, %o5
mov -1, %g1
std %o4, [%i0+56]
st %g1, [%i0+48]
add %i0, 44, %o1
st %g0, [%i0+40]
call init_helper, 0
mov %i1, %o0
cmp %o0, 0
sethi %hi(369664), %o0
bne .LL4
or %o0, 399, %o0
call stop, 0
nop
.LL4:
ret
