On Tue, Mar 16, 2010 at 1:13 PM, Paolo Carlini <paolo.carl...@oracle.com> wrote:
> On 03/16/2010 08:53 PM, H.J. Lu wrote:
>> The question is what processor macros should "-march=x86-64" define. There
>> is
>>
>>       {"x86-64", PROCESSOR_K8, CPU_K8,
>>         PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_NO_SAHF},
>>
>> For -march=x86-64, __k8 is defined.  However, real K8 supports:
>>
>>       {"k8", PROCESSOR_K8, CPU_K8,
>>         PTA_64BIT | PTA_MMX | PTA_3DNOW | PTA_3DNOW_A | PTA_SSE
>>         | PTA_SSE2 | PTA_NO_SAHF},
>>
>> It isn't an issue in i386.c since PROCESSOR_K8 isn't used to check
>> ISAs. But using __k8 to check ISAs is a problem.
>>
> I'm not sure to follow the gory details of your reply, but to me, it
> seems *really* strange that *now*, on x86_64, "-m32" is not the same as
> "-m32 -march=-i686" as far as __i686 is concerned...
>

We never defined __i686 for -m32 by default on x86_64. Here is
a patch to define __i686 for -m32 if the processor supports it.

-- 
H.J.
2010-03-16  H.J. Lu  <hongjiu...@intel.com>

        * config/i386/i386-c.c (ix86_target_macros_internal): Define
        __i686/__i686__ for PROCESSOR_K8, PROCESSOR_AMDFAM10,
        PROCESSOR_PENTIUM4, PROCESSOR_NOCONA, PROCESSOR_CORE2 and
        PROCESSOR_ATOM.

diff --git a/gcc/config/i386/i386-c.c b/gcc/config/i386/i386-c.c
index 35eab49..f6dad14 100644
--- a/gcc/config/i386/i386-c.c
+++ b/gcc/config/i386/i386-c.c
@@ -100,26 +100,53 @@ ix86_target_macros_internal (int isa_flag,
        def_or_undef (parse_in, "__athlon_sse__");
       break;
     case PROCESSOR_K8:
+      if (!TARGET_64BIT)
+       {
+         def_or_undef (parse_in, "__i686");
+         def_or_undef (parse_in, "__i686__");
+       }
       def_or_undef (parse_in, "__k8");
       def_or_undef (parse_in, "__k8__");
       break;
     case PROCESSOR_AMDFAM10:
+      if (!TARGET_64BIT)
+       {
+         def_or_undef (parse_in, "__i686");
+         def_or_undef (parse_in, "__i686__");
+       }
       def_or_undef (parse_in, "__amdfam10");
       def_or_undef (parse_in, "__amdfam10__");
       break;
     case PROCESSOR_PENTIUM4:
+      def_or_undef (parse_in, "__i686");
+      def_or_undef (parse_in, "__i686__");
       def_or_undef (parse_in, "__pentium4");
       def_or_undef (parse_in, "__pentium4__");
       break;
     case PROCESSOR_NOCONA:
+      if (!TARGET_64BIT)
+       {
+         def_or_undef (parse_in, "__i686");
+         def_or_undef (parse_in, "__i686__");
+       }
       def_or_undef (parse_in, "__nocona");
       def_or_undef (parse_in, "__nocona__");
       break;
     case PROCESSOR_CORE2:
+      if (!TARGET_64BIT)
+       {
+         def_or_undef (parse_in, "__i686");
+         def_or_undef (parse_in, "__i686__");
+       }
       def_or_undef (parse_in, "__core2");
       def_or_undef (parse_in, "__core2__");
       break;
     case PROCESSOR_ATOM:
+      if (!TARGET_64BIT)
+       {
+         def_or_undef (parse_in, "__i686");
+         def_or_undef (parse_in, "__i686__");
+       }
       def_or_undef (parse_in, "__atom");
       def_or_undef (parse_in, "__atom__");
       break;

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