Hi all,
I have picked up what seems to be a simple patch from PR36399, but I don't know
enough assembler to tell whether it's fixing it completely or not.
The following function:
#include <xmmintrin.h>
__m128i r(__m128 d1, __m128 d2, __m128 d3, __m128i r, int t, __m128i s) {return
r+s;}
is compiled by Apple's GCC into:
pushl %ebp
movl %esp, %ebp
subl $72, %esp
movaps %xmm0, -24(%ebp)
movaps %xmm1, -40(%ebp)
movaps %xmm2, -56(%ebp)
movdqa %xmm3, -72(%ebp) #
movdqa 24(%ebp), %xmm0 #
paddq -72(%ebp), %xmm0 #
leave
ret
Instead of lines marked with #, FSF's GCC gives:
movdqa 40(%ebp), %xmm1
movdqa 8(%ebp), %xmm0
paddq %xmm1, %xmm0
By fixing SSE_REGPARM_MAX in config/i386/i386.h (following Apple's compiler
value), I get GCC now generates:
movdqa %xmm3, -72(%ebp)
movdqa 24(%ebp), %xmm0
movdqa -72(%ebp), %xmm1
paddq %xmm1, %xmm0
The first two lines are identical to Apple, but the last two don't. They seem
OK to me, but I don't know enough assembler to be really sure. Could someone
confirm the two are equivalent?
Thanks,
FX
PS: the patch is:
> Index: gcc/config/i386/i386.h
> ===================================================================
> --- gcc/config/i386/i386.h (revision 155505)
> +++ gcc/config/i386/i386.h (working copy)
> @@ -1810,7 +1810,7 @@
> #define X86_64_SSE_REGPARM_MAX 8
> #define X86_64_MS_SSE_REGPARM_MAX 4
>
> -#define X86_32_SSE_REGPARM_MAX (TARGET_SSE ? 3 : 0)
> +#define X86_32_SSE_REGPARM_MAX (TARGET_SSE ? (TARGET_MACHO ? 4 : 3) : 0)
>
> #define SSE_REGPARM_MAX
> \
> (TARGET_64BIT ? (TARGET_64BIT_MS_ABI ? X86_64_MS_SSE_REGPARM_MAX \
