Hi, Ian,
Thank you for the information about register allocation sequence.
My problem was solved by adding AP-to-FP entry to ELIMINABLE_REGS.
I also encountered another minor problem. When GCC tries to generate a
"push SP" instruction (e.g. some_func(&the_only_local_var);), it is
detected during reload, and "frame pointer required" condition is
forcibly set. I have noticed that the i386 port does not have this
problem, as "push" only works for non-stack-related registers. I tried
to implement similar solution on my MSP430 target, however,
restricting push instruction and adding a split statement causes
"unrecognizable insn" error for "push {virtusl-stack-vars}". I used
the following MD code:
(define_insn "*pushhi"
[(set (match_operand:HI 1 "push_operand" "=<")
(match_operand:HI 0 "general_no_elim_operand" "rim"))]
""
"* return msp430_pushhi(insn, operands, NULL);"
[(set_attr "length" "2")])
(define_split
[(match_scratch:HI 2 "r")
(set (match_operand:HI 1 "push_operand" "=<")
(match_operand:HI 0 "general_operand" "rim"))]
""
[(set (match_dup 2) (match_dup 0))
(set (match_dup 1) (match_dup 2))]
"")
Do you know any working way of telling GCC to use temporary scratch
register when the normal push INSN cannot be used?
--
Best regards,
Ivan Shcherbakov mailto:shcherba...@eit.uni-kl.de
TU Kaiserslautern, Germany
Department of Real-Time Systems
