GCC's data dependence analyse may inaccuracy

[Jianzhang Peng]

Hi,

I unroll the following code one times in a gimpile pass.

for(i=0; i< N ; i++)
  a[i] = b[i] + c[i];

And then I create the loops's ddg using build_intra_loop_deps ( ) in
an RTL pass;
I found the data dependence information:  insn 54 TRUE_DEPENDENCE insn 53.

insn 50  (set (reg:SF 243)  (mem/s:SF (reg:SI 236 [ ivtmp.46 ])     //
reg243 <-b[i]

insn 51 (set (reg:SF 244)   (mem/s:SF (reg:SI 235 [ ivtmp.49 ])     //
reg244 <-c[i]
insn 52 (set (reg:SF 245)
             (plus:SF (reg:SF 243)  (reg:SF 244)))
//reg245 <- reg243 + reg244

insn 53 (set (mem/s:SF (reg:SI 234 [ ivtmp.51 ])  (reg:SF 245))
//reg245->a[i]

insn 54 (set (reg:SF 246)
// reg246 <-b[i+1]
              (mem/s:SF (plus:SI (reg:SI 236 [ ivtmp.46 ])
                                  (const_int 4 [0x4]))

insn 55 (set (reg:SF 247)
             (mem/s:SF (plus:SI (reg:SI 235 [ ivtmp.49 ])
// reg247 <- c[i+ 1]
                        (const_int 4 [0x4]))

insn 56 (set (reg:SF 248)
//reg248 <- reg246 + reg247
              (plus:SF (reg:SF 246)
                       (reg:SF 247)))

insn 57 (set (mem/s:SF (plus:SI (reg:SI 234 [ ivtmp.51 ])
// reg248 -> a[i + 1]
                                 (const_int 4 [0x4])) [2 a S4 A32])
              (reg:SF 248))

...
===========================

(insn 50 49 51 3 loop.c:14 (set (reg:SF 243)
        (mem/s:SF (reg:SI 236 [ ivtmp.46 ]) [2 b S4 A32])) 320
{*movsf_hardfloat} (nil))

(insn 51 50 52 3 loop.c:14 (set (reg:SF 244)
        (mem/s:SF (reg:SI 235 [ ivtmp.49 ]) [2 c S4 A32])) 320
{*movsf_hardfloat} (nil))

(insn 52 51 53 3 loop.c:14 (set (reg:SF 245)
        (plus:SF (reg:SF 243)
            (reg:SF 244))) 7 {addsf3} (expr_list:REG_DEAD (reg:SF 244)
        (expr_list:REG_DEAD (reg:SF 243)
            (nil))))

(insn 53 52 54 3 loop.c:14 (set (mem/s:SF (reg:SI 234 [ ivtmp.51 ]) [2
a S4 A32])
        (reg:SF 245)) 320 {*movsf_hardfloat} (expr_list:REG_DEAD (reg:SF 245)
        (nil)))

(insn 54 53 55 3 loop.c:14 (set (reg:SF 246)
        (mem/s:SF (plus:SI (reg:SI 236 [ ivtmp.46 ])
                (const_int 4 [0x4])) [2 b S4 A32])) 320
{*movsf_hardfloat} (nil))

(insn 55 54 56 3 loop.c:14 (set (reg:SF 247)
        (mem/s:SF (plus:SI (reg:SI 235 [ ivtmp.49 ])
                (const_int 4 [0x4])) [2 c S4 A32])) 320
{*movsf_hardfloat} (nil))

(insn 56 55 57 3 loop.c:14 (set (reg:SF 248)
        (plus:SF (reg:SF 246)
            (reg:SF 247))) 7 {addsf3} (expr_list:REG_DEAD (reg:SF 247)
        (expr_list:REG_DEAD (reg:SF 246)
            (nil))))

(insn 57 56 58 3 loop.c:14 (set (mem/s:SF (plus:SI (reg:SI 234 [ ivtmp.51 ])
                (const_int 4 [0x4])) [2 a S4 A32])
        (reg:SF 248)) 320 {*movsf_hardfloat} (expr_list:REG_DEAD (reg:SF 248)
        (nil)))
(insn 58 57 61 3 loop.c:7 (set (reg/v:SI 241 [ i ])
        (plus:SI (reg/v:SI 241 [ i ])
            (const_int 2 [0x2]))) 10 {*addsi3} (nil))

(insn 61 58 62 3 loop.c:7 (set (reg:SI 240 [ ivtmp.29 ])
        (minus:SI (reg:SI 258)
            (reg/v:SI 241 [ i ]))) 23 {subsi3} (expr_list:REG_EQUAL
(minus:SI (const_int 10240 [0x2800])
            (reg/v:SI 241 [ i ]))
        (nil)))


(insn 62 61 63 3 loop.c:7 (set (reg:SI 236 [ ivtmp.46 ])
        (plus:SI (reg:SI 236 [ ivtmp.46 ])
            (const_int 8 [0x8]))) 10 {*addsi3} (nil))

(insn 63 62 64 3 loop.c:7 (set (reg:SI 235 [ ivtmp.49 ])
        (plus:SI (reg:SI 235 [ ivtmp.49 ])
            (const_int 8 [0x8]))) 10 {*addsi3} (nil))

(insn 64 63 67 3 loop.c:7 (set (reg:SI 234 [ ivtmp.51 ])
        (plus:SI (reg:SI 234 [ ivtmp.51 ])
            (const_int 8 [0x8]))) 10 {*addsi3} (nil))

(jump_insn 67 64 68 3 loop.c:7 (set (pc)
        (if_then_else (ne (reg/v:SI 241 [ i ])
                (reg:SI 259))
            (label_ref:SI 116)
            (pc))) 415 {*branch_equalitysi} (expr_list:REG_EQUAL
(if_then_else (ne (reg/v:SI 241 [ i ])
                (const_int 10238 [0x27fe]))
            (label_ref:SI 116)
            (pc))
        (expr_list:REG_BR_PROB (const_int 9800 [0x2648])
            (nil))))


Thanks

-- 
Jianzhang Peng