Hi all,

For a loop optimization at our backend (loop-pipelining) I would like to
move all the loop iv increment and loop condition calculation to the head of
a loop. This iv-acceleration should be visible at the final phase of the
compilation before the ASM code generation.

Currently, I did it right after the RTL loop-optimization by creating a new
basic block at the head of the loop, move all biv calculation, invariant
instructions and branch to calculate the loop exit to the basic block. Then
create an unconditional jump from the end of the loop to that block. 
The reason I did it here because the information about loop is available
here.

However, the new basic block ordering is unoptimal in the view of the later
optimization passes especially the bb_reorder optimization. This pass clear
all the modification I made for the iv-acceleration above. 

So my question is where in the optimization process should I do the
iv-acceleration above so that the form of the CFG will not be modified?
Should I do it after the bb_reordering pass? At this point can I still get
the loop information such as biv and invariant instruction? Is there any
difficulty if I do the iv-acceleration after the register allocation?

Thanks very much for your reading. Any help is really appreciated. 


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