2009/11/10 Richard Henderson <r...@redhat.com>: > On 11/10/2009 05:48 AM, Mohamed Shafi wrote: >> >> (define_insn "mulsi3" >> [(set (match_operand:SI 0 "register_operand" "=&d") >> (mult:SI (match_operand:SI 1 "register_operand" "%d") >> (match_operand:SI 2 "register_operand" "d")))] > > Note that "%" is only useful if the constraints for the two operands are > different (e.g. only one operand accepts an immediate input). When they're > identical, you simply waste cpu cycles asking reload to try the operands in > the other order. > >> [(set (match_dup 0) >> (ashift:SI >> (plus:SI (mult:HI (unspec:HI [(match_dup 2)] UNSPEC_REG_LOW) >> (unspec:HI [(match_dup 1)] UNSPEC_REG_HIGH)) >> (mult:HI (unspec:HI [(match_dup 2)] UNSPEC_REG_HIGH) >> (unspec:HI [(match_dup 1)] UNSPEC_REG_LOW))) >> (const_int 16))) >> (set (match_dup 0) >> (plus:SI (match_dup 0) >> (mult:HI (unspec:HI [(match_dup 2)] UNSPEC_REG_LOW) >> (unspec:HI [(match_dup 1)] UNSPEC_REG_LOW))))] > > Well for one, your modes don't match. You actually want your unspecs and > MULTs to be SImode. > > You could probably usefully model the second insn as > > (define_insn "mulsi3_part2" > [(set (match_operand:SI 0 "register_operand" "=d") > (plus:SI > (mult:SI (zero_extend:SI > (match_operand:HI 1 "register_operand" "d")) > (zero_extend:SI > (match_operand:HI 2 "register_operand" "d"))) > (match_operand:SI 3 "register_operand" "0")))] > "" > ...)
So i need to change the mode of the register from SI to HI after reloading. Is that allowed? Regards, Shafi
