Yes, you need this:
[(set (match_operand:SI 0 "register_operand" "=r")
(match_operand:SI 1 "register_operand" "r"))
(unspec_volatile [(const_int 0)] UNSPECV_VSWAPMOV)]
That works, thanks!
I just found the "=r" and "r" stuff myself almost at the same time your mail
arrived. But what does the "SI" do? I haven't found
It specifies that the register must be 32-bit (SImode, Single-word
Integer mode). It just shuts up the warnings.
Now the definition looks like this:
(define_insn "vswapmov"
[(parallel
[(set (match_operand:SI 0 "register_operand" "=r")
(match_operand:SI 1 "register_operand" "r"))
(unspec_volatile [(const_int 0)] UNSPECV_VSWAPMOV)]
)]
The parallel is implicit in define_insn, so it is not different. It
does not make any harm I guess, but it looks "weird" to a more familiar
eye. :-)
""
"movl.s\t%1,%0"
[(set_attr "length" "2")
(set_attr "length_immediate" "0")
(set_attr "modrm" "0")])
I am still compiling, so I don't know if it works yet.
I attached the current state of the whole patch. I added the attribute to the
documentation, and generated the patch with function names this time.
Here:
+#ifdef HAVE_AS_IX86_SWAP
+ { "msvc_prologue", 0, 0, false, true, true, ix86_handle_abi_attribute },
+#endif
it's better to always provide the attribute, and call "sorry" in
ix86_function_msvc_prologue if you don't have the .s suffix.
Another two nits since I've found a more serious one: :-)
1) do not remove spurious lines.
RTX_FRAME_RELATED_P (insn) = 1;
-
insn = emit_move_insn (hard_frame_pointer_rtx, stack_pointer_rtx);
RTX_FRAME_RELATED_P (insn) = 1;
-
if (ix86_cfa_state->reg == stack_pointer_rtx)
2) extra long line, go to new line *before* ? and colon:
+ if (TARGET_64BIT ? is_attribute_p ("msvc_prologue", name) :
!is_attribute_p ("msvc_prologue", name))
Thanks!!
Paolo
