Hariharan Sandanagobalane wrote:
Hi Vlad,
I am attaching a test function which has just a huge switch statement
with multiple cases doing different things. This function register
allocates on GCC 4.3.2 with no spills at all (at -Os). The function
has lots of live ranges that span function calls, but the old
allocator seemed to handle it quite well. With IRA, i get lots of
spills and a huge frame usage (160 bytes). Can you have a look and see
if this is some heuristic going wrong in IRA or just a degenerate case?
I tried this testcase with all the IRA options, but nothing helped
much in reducing code size/frame size.
Picochip's assembly is RISC and the instructions should be obvious,
but if you need anything, please refer
http://www.picochip.com/downloads/picoGcc_reference_manual.pdf or ask
me! You can ofcourse build picochip target (picochip-unknown-none) on
mainline if you need to.
Attachments:
4_3.tgz - Contains source, assembly and all the dump files from -da
from GCC 4.3.2.
mainline.tgz - Similar tar from mainline(as of 11/08/2009).
Your help is greatly appreciated. Let me know if you need any more
information.
As I understood correctly, the gcc4.3 did not generate spills. I've
checked gcc4.4, there are a lot of spills and there is no possibility to
rid off them because IRA reports register pressure equal to 88 and the
processor has less 16 regs.
So I guess some other optimization changed between 4.3 and 4.4 started
to generate such big register pressure. But unfortunately, I have no
idea what optimization it is. Probably you should compare each pass
dump to find this. I can not do this because 4.3 has no picochip support.
