I'm working on a VLIW coprocessor for MeP. One thing I noticed is
that sched2 won't bundle the function's RET with the insn that sets
the return value register, apparently because there's an intervening
USE of that register (insn 30 in the example below).
Is there any way around this? The return value obviously isn't
actually used there, nor does the return insn need it - that USE is
just to keep the return value live until the function exits.
sched_reorder: clock 3 nready 1
insn 671 27 cgen_intrinsic_cpadd3_h_P0S_P1 p0s,p1
;; Ready list (t = 3): 27
;; 3--> 27 $c0=unspec[$c16,$c0] 1774
:(ivc2_p0+ivc2_slot_p0s)|(ivc2_p1+ivc2_slot_p1)
;; dependencies resolved: insn 30
;; tick updated: insn 30 into ready
;; Ready list (t = 3): 30
;; Ready list after queue_to_ready: 30
;; Ready list after ready_sort: 30
sched_reorder: clock 4 nready 1
insn -1 30 {unknown} none
;; Ready list (t = 4): 30
;; 4--> 30 use $c0 :nothing
;; dependencies resolved: insn 36
;; tick updated: insn 36 into ready
;; Ready list (t = 4): 36
;; 4--> 36 {return;use $lp;}
:(ivc2_core+ivc2_slot_c16)
;; Ready list (t = 4):
;; Ready list (final):
;; total time = 4
;; new head = 9
;; new tail = 36
(insn:TI 27 19 30 2 dj.c:9 (set (reg/i:DI 48 $c0)
(unspec:DI [
(reg:DI 64 $c16 [140])
(reg:DI 48 $c0 [143])
] 1774)) 671 {cgen_intrinsic_cpadd3_h_P0S_P1} (expr_list:REG_DEAD
(reg:DI 64 $c16 [140])
(nil)))
(insn 30 27 35 2 dj.c:9 (use (reg/i:DI 48 $c0)) -1 (nil))
(note 35 30 36 2 NOTE_INSN_EPILOGUE_BEG)
(jump_insn:TI 36 35 37 2 dj.c:9 (parallel [
(return)
(use (reg:SI 17 $lp))
]) 979 {return_internal} (expr_list:REG_DEAD (reg:SI 17 $lp)
(nil)))
