sean darcy <seandar...@gmail.com> writes: > If I run gcc -fverbose-asm -mtune=native -march=native -S x.c > > I get > cat x.s: > .file "x.c" > # GNU C (GCC) version 4.4.0 20090506 (Red Hat 4.4.0-4) (x86_64-redhat-linux) > # compiled by GNU C version 4.4.0 20090506 (Red Hat 4.4.0-4), GMP > version 4.2.4, MPFR version 2.4.1. > # GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072 > # options passed: x.c -march=core2 -mcx16 -msahf --param l1-cache-size=32 > # --param l1-cache-line-size=64 --param l2-cache-size=2048 -mtune=core2 > # -fverbose-asm > # options enabled: -falign-loops -fargument-alias > ................... > # -mfp-ret-in-387 -mfused-madd -mglibc -mieee-fp -mmmx -mno-sse4 > # -mpush-args -mred-zone -msahf -msse -msse2 -msse3 -mssse3 > ............ > > cat /proc/cpuinfo: > > flags : .....sse sse2 .... ssse3 .... sse4_1 ... > > Is this a bug in the march-native code, or is there a reason sse4.1 is > not enabled (this cpu does not support sse4.2)?
This question is more appropriate for the gcc-h...@gcc.gnu.org mailing list. Please take any followups to gcc-help. Thanks. In gcc, -msse4 implies both SSE4.1 and SSE4.2. Since your processor does not support both, -mno-sse4 is in effect. Actually, at present gcc does not consider any processor to support SSE4.1 or SSE4.2 by default. You always have to select them explicitly. This seems to be a bug. I would encourage you to open a bug report, if there isn't already one about this; see http://gcc.gnu.org/bugs.html . Thanks. Ian
