2009/3/2 daniel tian <daniel.xnt...@gmail.com>:
> 2009/2/27 daniel tian <daniel.xnt...@gmail.com>:
>> 2009/2/27 Dave Korn <dave.korn.cyg...@googlemail.com>:
>>> daniel tian wrote:
>>>
>>>> That seems to solving a address mode problem. My problem is that while
>>>> loading a large immediate data or SYMBOL_REF,  the destination is a
>>>> specified general register (register 0:R0). So I don't how to let the
>>>> define_expand "movsi" pattern to generate destination register in R0.
>>>
>>>  Well, the RTL that you emit in your define_expand has to match an insn
>>> pattern in the end, so you could make an insn for it that uses a predicate 
>>> and
>>> matching constraint to enforce only accepting r0.  If you use a predicate 
>>> that
>>> only accepts r0 you'll get better codegen than if you use a predicate that
>>> accepts general regs and use an r0-only constraint to instruct reload to 
>>> place
>>> the operand in r0.
>>
>> Well, I have already done this. There is insn pattern that the
>> predicate limits the operand in R0. But if in define_expand "movsi" do
>> not put the register in R0, the compiler will  crashed because of the
>> unrecognized RTL(load big immediate or Symbol). Like the below:
>> (define_insn "load_imm_big"
>>        [(set (match_operand:SI 0 "zero_register_operand" "=r")
>>              (match_operand:SI 1 "rice_imm32_operand" "i"))
>>              (clobber (reg:SI 0))]
>>        "TARGET_RICE"
>>        {
>>                return rice_output_move (operands, SImode);
>>        }
>> )
>>
>> PS:rice_output_move  is function to output assemble code.
>>
>> Thanks.
>>
>
> Hello, Dave, Rennecke :
>      I defined the PREFERRED_RELOAD_CLASS macro, but this cc1 doesn't
> go through it.
>      #define PREFERRED_RELOAD_CLASS(X, CLASS)
> rice_preferred_reload_class(X, CLASS)
>
>      And rice_preferred_reload_class(X, CLASS) is:
>
>      enum reg_class rice_preferred_reload_class (rtx x, enum reg_class class)
>     {
>        printf("Come to rice_preferred_reload_class! \n");
>
>        if((GET_CODE(x) == SYMBOL_REF) ||
>           (GET_CODE(x) == LABEL_REF) ||
>           (GET_CODE(x) == CONST) ||
>           ((GET_CODE(x) == CONST_INT) && (!Bit10_constant_operand(x, 
> GET_MODE(x)))))
>        {
>                return R0_REG;
>        }
>        return class;
>      }
>
>     I run the cc1 file with command "./cc1 test_reload.c  -Os". But
> the gcc never goes through this function. Did I missed something?
>     Thank you very much.
>

Hello, I resolved the problem. The key is the macro
LEGITIMIZE_RELOAD_ADDRESS, and GO_IF_LEGITIMATE_ADDRESS, and
PREFERRED_RELOAD_CLASS. And the predicate "zero_register_operand".
Here is the thing I learnt. If I did something wrong,  let me know. :)

LEGITIMIZE_RELOAD_ADDRESS: in this macro, I should push the invalid
the rtx like large immeidate, symbol_rel, label_rel, into the function
push_reload which will call macro PREFERRED_RELOAD_CLASS.

GO_IF_LEGITIMATE_ADDRESS: this macro will have two mode, strict or
non_strict, the former used in reload process, the latter used in
before reload. I made a mistake in this macro, defined the two mode
exactly in the same way( I defined the large immeidate, SYMBOL_REL,
LABEL_REL, CONST is valid in two mode ). So it nerver call macro
LEGITIMIZE_RELOAD_ADDRESS. The function find_reloads_address in
reloads.c will call GO_IF_LEGITIMATE_ADDRESS first, if rtx is a valid
address, it will nerver goto macro LEGITIMIZE_RELOAD_ADDRESS.

PREFERRED_RELOAD_CLASS: this macro is in function push_reload which
was mentioned above.

and the predicate "zero_register_operand", I defined the rtx with the
register NO. being 0. So Everytime, cc1 will abort with information
like "rtl unrecognize". Because pseudo register are allocated before
reload. I revised the predicate which register NO should be 0 or
pseudo.

Now It is Ok. But it still has some redundency code. I will keep going.
Your guys are so kind. Thank you very much.
Thank you for your help again!

Best Regards!


                                                  Daniel.Tian

Reply via email to