Hi all,
Not sure if this fits in more with GCC or binutils.
We have amodified binutils/gcc to add a few opcodes to the MIPS-I ISA for a
processor we've designed as part of our academics. One of these opcodes writes
an index into a register we specify.
This works, but we're seeing
1) the value of the register before we write to it getting stored on the stack
2) our opcode loading the correct value into the register
3) the value then being read back from the stack instead of the register
when we use any optimizations above -O0.
A sample code listing is at the bottom of the email, as well as the lines we've
added to opcodes/mips-opc.c for our opcodes.
Anyone know how to stop the register from being stored and read from on the
stack? We've defined it as
volatile register int idx asm("s0");
Thanks,
Richard
mips-opc.c:
const struct mips_opcode mips_builtin_opcodes[] =
{
{"spumov", "d", 0x44000000, 0xffff07ff, WR_d, 0, IK },
{"setspu", "j", 0x40000000, 0xffff0000, 0, 0, IK },
.....
code listing:
1.
500027a8: afb0013c sw s0,316(sp) <--------------- s0 is
saved to stack
2.
500027ac: 24630001 addiu v1,v1,1
3.
500027b0: afa30130 sw v1,304(sp)
4.
500027b4: 0000f021 move s8,zero
5.
500027b8: 00001010 mfhi v0
6.
500027bc: 00021042 srl v0,v0,0x1
7.
500027c0: 24420001 addiu v0,v0,1
8.
500027c4: 00f00018 mult a3,s0
9.
500027c8: 00001812 mflo v1
10.
500027cc: afa30140 sw v1,320(sp)
11.
500027d0: 00021840 sll v1,v0,0x1
12.
500027d4: 00621821 addu v1,v1,v0
13.
500027d8: afa30144 sw v1,324(sp)
14.
500027dc: 40000007 setspu 7
15.
500027e0: 44008000 spumov s0 <-------------- We
change value of s0
16.
500027e4: 8fa4017c lw a0,380(sp)
17.
500027e8: 8fa50130 lw a1,304(sp)
18.
500027ec: 8fa6013c lw a2,316(sp) <-------------- s0 is
loaded from stack
