On Sat, May 24, 2008 at 12:26 AM, Omar Torres <[EMAIL PROTECTED]> wrote:
> Mohamed Shafi wrote:
>> Hello Omar,
>>
>> I saw your mail to gcc mailing list regarding splitting of HImode
>> patterns into QImode patterns. I am also involved in porting. My
>> problem is similar to yours. But i have to split SImode patterns into
>> HImode patterns.
>>
>> I am sure that you have modified your define_split patterns after
>> receiving the suggestions from the mailing list. Could you just mail
>> me the finalized define_split pattern of HImode.
>>
>> One thing that i noticed in your split pattern is that you are not
>> handling cases where operand[0] is memory, i.e store patterns. How
>> are you handling this? Do you have a define_insn for this case?
>>
>> I hope you don't mind me asking these questions.
>>
>> Thank you for your time.
>>
>> Regards,
>> Shafi
>>
>>
>
> Hi Mohamed,
> I added the gcc mailing list to the threat.
>
> My current implementation looks like this:
> ;; movhi
> (define_expand "movhi"
> [(set (match_operand:HI 0 "nonimmediate_operand" "")
> (match_operand:HI 1 "general_operand" ""))]
> ""
> {
> if (c816_expand_move (HImode, operands)) {
> DONE;
> }
> })
>
> ;; =&r creates an early clobber.
> ;; It prevent insn where the target register
> ;; is the same as the base register used for memory addressing...
> ;; This is needed so that the split produce correct code.
> (define_insn "*movhi"
> [(set (match_operand:HI 0 "nonimmediate_operand" "=&r,m")
> (match_operand:HI 1 "general_operand" "g,r"))]
> ""
> "#")
>
> (define_split
> [(set (match_operand:HI 0 "nonimmediate_operand" "")
> (match_operand:HI 1 "general_operand" ""))]
> "reload_completed"
> [(set (match_dup 2) (match_dup 4))
> (set (match_dup 3) (match_dup 5))]
> "{
> gcc_assert (REG_P (operands[0]) || MEM_P (operands[0]));
>
> #ifdef DEBUG_OVERLAP
> if (reg_overlap_mentioned_p(operands[0], operands[1])){
> fprintf (stderr, \"\nOperands Overlap:\n\");
> debug_rtx (curr_insn);
> }
> #endif
>
> if (REG_P (operands[0])) {
> operands[2] = gen_highpart(QImode, operands[0]);
> operands[3] = gen_lowpart (QImode, operands[0]);
> }
> else if (MEM_P (operands[0])) {
> operands[2] = adjust_address (operands[0], QImode, 0);
> operands[3] = adjust_address (operands[0], QImode, 1);
> }
>
> if (MEM_P (operands[1])) {// || CONST == GET_CODE (operands[1])) {
> operands[4] = adjust_address (operands[1], QImode, 0);
> operands[5] = adjust_address (operands[1], QImode, 1);
> }
> else if (LABEL_REF == GET_CODE (operands[1])
> || SYMBOL_REF == GET_CODE (operands[1])) {//
> operands[4] = simplify_gen_subreg(QImode, operands[1], HImode, 0);
> operands[5] = simplify_gen_subreg(QImode, operands[1], HImode, 1);
> }
> else if (CONST_INT == GET_CODE (operands[1])
> || REG_P (operands[1])) {
> operands[4] = simplify_gen_subreg(QImode, operands[1], HImode, 0);
> operands[5] = simplify_gen_subreg(QImode, operands[1], HImode, 1);
> }
> else {
> error(\"Unrecognized code in operands[1]\");
> fputs(\"\nrtx code is: \", stderr);
> debug_rtx(curr_insn);
> abort();
> }
> }")
>
>
> The purpose of the expand is to load Label or Symbol references into
> base registers for index addressing. I decided to use the expand since
> the force_reg() was failing when I called from the split.
>
Thank you for your reply.
I think you can do this in GO_IF_LEGITIMATE_ADDRESS macro. There
just return false if you find the above addressing modes or rather
return tru only for the addressing modes you want to use. That way gcc
will automatically load the symbol ref to registers.
Regards,
Shafi
