Richard Guenther wrote:
On Wed, Mar 12, 2008 at 4:23 PM, Joel Sherrill
<[EMAIL PROTECTED]> wrote:
Hi,
Did the default i386 CPU model that gcc generates
code for change between 4.2.x and 4.3.0? I didn't
see anything in the release notes that jumps out at
me about this.
Using i386-rtems4.9 as the target, I was running
code compiled by gcc 4.3.0 on a vanilla i386 and
was getting illegal instruction exceptions. I looked
at the assembly and noticed instructions which were
not on the i386. Obviosuly, when I added -mtune=i386
and the issue went away.
This probably impacts no one on a GNU/Linux computer
since very few of those are base i386's anymore. Just
venerable embedded systems. :)
-mtune doesn't change the instruction set, -march/-mcpu does.
So this is probably a bug in the instruction predicates. What
is the illegal instruction gcc emits?
I saw a series of instructions with something like
mm0 as a register. I can't duplicate it now but
also realized that a background automated run
of tests may have been replacing the boot image
behind my back. <sigh> The danger of multitasking.
I am sorry to have raised this. I think this points out
what is happening in the failures I see when running
the gcc testsuite though:
http://gcc.gnu.org/ml/gcc-testresults/2008-02/msg00944.html
Lots of tests with "vect" or "sse" in the name fail when run
on the same vanilla i386 target. For example,
gcc.dg/vect/costmodel/i386/costmodel-vect-31.c fails with
a similar illegal instruction exception. Looking at that particular
case, I see that it is compiled with -msse2 and fails with an
illegal instruction exception when it tries this one:
10022a: f2 0f 10 c0 movsd %xmm0,%xmm0
Is there any way to skip these tests for particular HW features
that are not present? There are similar failures on the PowerPC
target I use for reporting because it doesn't have Altivec.
Thanks. Sorry for the bogus question.
Richard.
--
Joel Sherrill, Ph.D. Director of Research & Development
[EMAIL PROTECTED] On-Line Applications Research
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