Martin Jambor wrote: > On Tue, Mar 04, 2008 at 10:50:17PM +0000, Paul Brook wrote: >>> AFAIK the only reason we don't break this rule is that doing so would >>> be grossly inefficient; there's nothing to stop any gcc back-end with >>> (say) seriously slow DImode writes from using two SImode writes instead. >> I'm fairly sure ARM already breaks this "rule". >> > > Hm, just out of curiosity, does not Java require 32-bit stores to be > atomic?
Yes. > I do not know Java well but I think it does. Do we observe > this language-specific rule on ARM then? Yes. > Do we do it because 32 bit is > small enough or do we have a mechanism for that? We do it because 32 bits is small enough. I don't suppose anyone has gone through any back-end to make sure we don't write 32-bit aligned stores in two instructions. If we do that, then Java will break, but I think we have more important things to worry about. Andrew.
