hi,
I have been porting tic54x to gcc. I use gcc-4.2.2 version. I write some
simplest c54x.h and c54x.c and a empty md, and I
compile it to generate the tic54x-gcc compiler.
But when I execute the compiler I generate I got a segmentation fault error. Is
there anything must be define in c54x.c or
c54x.h that could make the simplest compiler with no correct output and no
errors? Because I want to add functions from this
basic port.
thanks.
here is my files
--------------------------------------------------------
/*******************c54x.h************************/
/* number of registers */
#define FIRST_PSEUDO_REGISTER 25
/* number of register classes */
#define N_REG_CLASSES 26
struct cumul_args {
int has_varargs;
int numarg;
};
#define CUMULATIVE_ARGS struct cumul_args
/* Node: Register Classes */
/* TODO: get rid of single-register classes? */
enum reg_class
{
NO_REGS,
IMR_REG,
IFR_REG,
A_REG,
B_REG,
T_REG,
TRN_REG,
SP_REG,
BK_REG,
BRC_REG,
RSA_REG,
REA_REG,
PMST_REG,
XPC_REG,
DP_REG,
ST_REGS,
INT_REGS,
STAT_REGS,
ACC_REGS,
BR_REGS,
DBL_OP_REGS,
AUX_REGS,
ARSP_REGS,
MMR_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES
};
#define STRICT_ALIGNMENT 1 /* Nothing is smaller than alignment.. */
#define BYTES_BIG_ENDIAN 0
#define FUNCTION_BOUNDARY BITS_PER_WORD
#define UNITS_PER_WORD 1
#define BIGGEST_ALIGNMENT BITS_PER_WORD*2
/* Node: 13.11 Trampolines for Nested Functions */
#define TRAMPOLINE_SIZE 2 /* Just a guess for now */
#define STACK_BOUNDARY BITS_PER_WORD
#define Pmode QImode
/* Stack pointer */
#define SP_REGNO 16
#define STACK_POINTER_REGNUM SP_REGNO
#define AR7_REGNO 15
#define FRAME_POINTER_REGNUM AR7_REGNO
/* Fake argument pointer reg */
#define ARG_REGNO 24
#define ARG_POINTER_REGNUM ARG_REGNO
#define WORDS_BIG_ENDIAN 0
#define PARM_BOUNDARY BITS_PER_WORD
#define FUNCTION_MODE QImode
#define BASE_REG_CLASS ARSP_REGS
#define MOVE_MAX 1
#define BITS_BIG_ENDIAN 1
/* Node: 10.10.5 Elimination */
#define FRAME_POINTER_REQUIRED 0
/* Node: 13.15 Describing Relative Costs of Operations */
#define SLOW_BYTE_ACCESS 1
#define CASE_VECTOR_MODE QImode
/* Node: 13.13 Addressing Modes */
#define MAX_REGS_PER_ADDRESS 2
#define ASM_APP_ON "#APP"
#define ASM_APP_OFF "#NO_APP"
#define STARTING_FRAME_OFFSET -1 /* Local frame starts just below the frame
pointer */
/*sam added start*/
//optabs.c used this...
#define CODE_FOR_indirect_jump 8
/*sam added end*/
#define DEFAULT_SIGNED_CHAR 0 /* FIXME (ripped from c4x) */
/* FIXME: double check this */
#define INDEX_REG_CLASS NO_REGS
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
do { \
} while (0)
#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \
do { \
} while(0);
/* registers that have a fixed purpose
* * and can't be used for general tasks. */
#define FIXED_REGISTERS \
{ \
/* IMR IFR ST0 ST1 A B T TRN AR0 AR1 AR2 */ \
1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
/* AR3 AR4 AR5 AR6 AR7 SP BK BRC RSA REA PMST XPC DP ARG*/ \
0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 1, 1, 1 \
}
#define CALL_USED_REGISTERS \
{ \
/* IMR IFR ST0 ST1 A B T TRN AR0 AR1 AR2 */ \
1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, \
/* AR3 AR4 AR5 AR6 AR7 SP BK BRC RSA REA PMST XPC DP ARG */ \
1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1 \
}
/* Defines which registers are in which classes */
#define REG_CLASS_CONTENTS \
{ \
{0x00000000}, /* NO_REGS */ \
{0x00000001}, /* IMR_REG */ \
{0x00000002}, /* IFR_REG */ \
{0x00000010}, /* A_REG */ \
{0x00000020}, /* B_REG */ \
{0x00000040}, /* T_REG */ \
{0x00000080}, /* TRN_REG */ \
{0x00010000}, /* SP_REG */ \
{0x00020000}, /* BK_REG */ \
{0x00040000}, /* BRC_REG */ \
{0x00080000}, /* RSA_REG */ \
{0x00100000}, /* REA_REG */ \
{0x00200000}, /* PMST_REG */ \
{0x00400000}, /* XPC_REG */ \
{0x00800000}, /* DP_REG */ \
{0x0000000c}, /* ST_REGS */ \
{0x00000003}, /* INT_REGS */ \
{0x0020000c}, /* STAT_REGS */ \
{0x00000030}, /* ACC_REGS */ \
{0x001c0000}, /* BR_REGS */ \
{0x00003c00}, /* DBL_OP_REGS */ \
{0x0000ff00}, /* AUX_REGS */ \
{0x0001ff00}, /* ARSP_REGS */ \
{0x007fffcf}, /* MMR_REGS */ \
{0x011efff0}, /* GENERAL_REGS */ \
{0xffffffff} /* ALL_REGS */ \
}
#define REGISTER_NAMES { \
"imr", "ifr", "st0", "st1", \
"a", "b", "t", "trn", "ar0", "ar1", "ar2", \
"ar3", "ar4", "ar5", "ar6", "ar7", \
"sp", "bk", "brc", "rsa", "rea", \
"pmst", "xpc", "dp", "arg" }
#define REG_CLASS_NAMES \
{ \
"NO_REGS", \
"IMR_REG", \
"IFR_REG", \
"A_REG", \
"B_REG", \
"T_REG", \
"TRN_REG", \
"SP_REG", \
"BK_REG", \
"BRC_REG", \
"RSA_REG", \
"REA_REG", \
"PMST_REG", \
"XPC_REG", \
"DP_REG", \
"ST_REGS", \
"INT_REGS", \
"STAT_REGS", \
"ACC_REGS", \
"BR_REGS", \
"DBL_OP_REGS", \
"AUX_REGS", \
"ARSP_REGS", \
"MMR_REGS", \
"GENERAL_REGS", \
"ALL_REGS", \
}
#define TARGET_CPU_CPP_BUILTINS() \
do { \
builtin_assert ("cpu=c54x"); \
builtin_assert ("machine=c54x"); \
builtin_define_std ("c54x"); \
} while (0)
/* Accumulators A and B */
#define A_REGNO 4
#define FUNCTION_ARG_REGNO_P(REGNO) (REGNO == A_REGNO)
#define ASM_GENERATE_INTERNAL_LABEL(BUFFER, PREFIX, NUM) \
sprintf((BUFFER), "%s%lu?", (PREFIX), (unsigned long)(NUM))
//#define HARD_REGNO_MODE_OK(REGNO, MODE) c54x_hard_regno_mode_ok(REGNO, MODE)
#define HARD_REGNO_MODE_OK(REGNO, MODE) 0
//#define FUNCTION_VALUE_REGNO_P(REGNO) ((REGNO) == A_REGNO)
#define FUNCTION_VALUE_REGNO_P(REGNO) ((REGNO) == A_REGNO)
//#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT)
c54x_initialize_trampoline((TRAMP), (FNADDR), (CXT))
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) 0
/* The caller does all the popping. */
#define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, STACKSIZE) 0
//#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS)
(init_cumulative_args(&(CUM), (FNTYPE), (LIBNAME),
(FNDECL)))
#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) 0
//#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) (function_arg(&(CUM), (MODE),
(TYPE), (NAMED)))
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) 0
//#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)
(function_arg_advance(&(CUM), (MODE), (TYPE), (NAMED)))
#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) 0
//#define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
#define REGNO_REG_CLASS(REGNO) 0
#define LEGITIMATE_CONSTANT_P(X) 1 /* Not sure */
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
//#define CONSTANT_ADDRESS_P(X) (GET_CODE (X) == LABEL_REF || GET_CODE (X) ==
SYMBOL_REF || GET_CODE (X) == CONST_INT ||
GET_CODE (X) == CONST)
#define CONSTANT_ADDRESS_P(X) 0
#define LIBCALL_VALUE(MODE) gen_rtx_REG((MODE), A_REGNO)
#define ASM_OUTPUT_ALIGN(STREAM, POWER) fprintf((STREAM), ".align %d", (POWER))
#define FIRST_PARM_OFFSET(FUNCDECL) 0 /* Argument pointer points to the
first(lower)argument */
/*sam added start*/
#define CONSTRAINT_LEN(a,b) 0
#define REG_CLASS_FROM_CONSTRAINT(a,b) 0
/*sam added end*/
/* Node: 13.9.12 Generating Code for Profiling */
#define FUNCTION_PROFILER {}
//#define PRINT_OPERAND(STREAM, X, CODE) c54x_print_operand((STREAM), (X),
(CODE))
#define PRINT_OPERAND(STREAM, X, CODE) 0
//#define PRINT_OPERAND_ADDRESS(STREAM, X) c54x_print_operand_address((STREAM),
(X))
#define PRINT_OPERAND_ADDRESS(STREAM, X) 0
//#define MODES_TIEABLE_P(MODE1, MODE2) ((MODE1) == (MODE2) || GET_MODE_CLASS
(MODE1) == GET_MODE_CLASS (MODE2))
#define MODES_TIEABLE_P(MODE1, MODE2) 0
/*sam added start*/
#define CONST_DOUBLE_OK_FOR_CONSTRAINT_P(a,b,c) 0
#define CONST_OK_FOR_CONSTRAINT_P(a,b,c) 0
#define CLASS_MAX_NREGS(a,b) 0
#define PREFERRED_RELOAD_CLASS(a,b) 0
#define HARD_REGNO_NREGS(a,b) 0
#define REGNO_OK_FOR_BASE_P(a) 0
#define REGNO_OK_FOR_INDEX_P(a) 0
#define ASM_OUTPUT_COMMON(a,b,c,d) 0
#define ASM_OUTPUT_LOCAL(a,b,c,d) 0
#define ASM_OUTPUT_SKIP(a,b) 0
#define INITIAL_FRAME_POINTER_OFFSET(a) 0
/*sam added end*/
--------------------------------------------------------------------
/**************************c54x.c*******************************/
/*
#include "target.h"
#include "target-def.h"
#include "system.h"
#include "function.h"
*/
#include "config.h"
#include "system.h"
#include "coretypes.h"
#include "tm.h"
#include "rtl.h"
#include "tree.h"
#include "tm_p.h"
#include "regs.h"
#include "hard-reg-set.h"
#include "real.h"
#include "insn-config.h"
#include "conditions.h"
#include "output.h"
#include "insn-codes.h"
#include "insn-modes.h"
#include "insn-attr.h"
#include "flags.h"
#include "except.h"
#include "function.h"
#include "recog.h"
#include "expr.h"
#include "optabs.h"
#include "toplev.h"
#include "basic-block.h"
#include "ggc.h"
#include "target.h"
#include "target-def.h"
#include "langhooks.h"
#include "cgraph.h"
#include "tree-gimple.h"
#include "emit-rtl.h"
struct gcc_target targetm = TARGET_INITIALIZER;
/*sam added start*/
rtx gen_jump (rtx operand0 ATTRIBUTE_UNUSED)
{
return 0;
}
rtx gen_indirect_jump (rtx operand0 ATTRIBUTE_UNUSED)
{
return 0;
}
void default_globalize_label (FILE *fp, const char *str)
{
}
/*sam added end*/
-----------------------------------------------------------
/**************************compile_install.sh**************/
#!/bin/bash
DPATH="/home/sam/download/gcc_installer/SRC/"
PREFIX="${DPATH}c54_4.2.2"
TARGET="tic54x"
gcc="gcc-4.2.2"
binutils="binutils-2.18"
newlib="newlib-1.15.0"
bin_gcc="build_${gcc}"
bin_binutils="build_${binutils}"
bin_newlib="build_${newlib}";
export CC="gcc" # set bootstrp compiler
export PATH=${PREFIX}/bin:$PATH
mkdir -p ${PREFIX}
cd SRC
cd BUILD
function installbinutils()
{
mkdir ${bin_binutils}
cd ${bin_binutils}
../../${binutils}/configure --target=${TARGET} --prefix=${PREFIX}
--disable-nls 2>&1 | tee configure.out
make all 2>&1 | tee make.out
make install 2>&1 | tee -a install_make.out
cd -
}
function installgcc()
{
mkdir ${bin_gcc}
cd ${bin_gcc}
../../${gcc}/configure --target=${TARGET} --prefix=${PREFIX} --disable-nls
--enable-languages=c --disable-libssp --
with-headers --with-newlib 2>&1 | tee configure.out
make all-gcc 2>&1 | tee make.out
make install-gcc 2>&1 | tee install.out
cd -
}
installbinutils
installgcc
cd $PROJ
-------------------------------------------------------
thanks,
sam
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