Re: [ARM] Cirrus EP93xx Maverick Crunch Support - CC modes / condexec / CC_REGNUM

[gcc]

On Fri, 29 Jun 2007 13:31:13 +0200, "Rask Ingemann Lambertsen"
<[EMAIL PROTECTED]> said:
> On Fri, Jun 29, 2007 at 11:43:49AM +1000, Hasjim Williams wrote:
> > The only problem would be, is that anything that clobbers CC_REGNUM
> > needs to clobber CC_REGNUM_MAVERICK too (and vice-versa), since even
> > though they are pseudo-registers, they both are the NZCV flags in
> > pc/r15.
> 
>    Exactly. The condition code register is not a pseudo register, it is a
> hard register and GCC needs to know that a MaverickCrunch comparison will
> clobber the result of a previous non-MaverickCrunch comparison and vice
> versa. You must keep the same CC_REGNUM because it's the same NZCV bits
> in
> hardware.

Well, technically it is a pseudo register, since it's shared with
r15/PC, and modifying PC doesn't modify the NZCV bits.  But they need to
be tracked separately.

I don't need to modify "cc_register" in predicates.md then, like you
said in http://gcc.gnu.org/ml/gcc/2007-06/msg00932.html , right?

I just need to override the "arm_cond_branch" etc with the CCFP or CCMAV
mode, and make sure it uses the maverick comparison codes:

(define_insn "*maverick_cond_branch"
  [(set (pc)
        (if_then_else (match_operator 1 "maverick_comparison_operator"
                       [(match_operand:CCFP 2 "cc_register" "") (const_int 0)])
                      (label_ref (match_operand 0 "" ""))
                      (pc)))]
  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_MAVERICK"
  "*
  if (arm_ccfsm_state == 1 || arm_ccfsm_state == 2)
    {
      arm_ccfsm_state += 2;
      return \"\";
    }
  return \"b%d1\\t%l0\";
  "
  [(set_attr "conds" "use")
   (set_attr "type" "branch")]
)

(define_insn "*arm_cond_branch"
  [(set (pc)
        (if_then_else (match_operator 1 "arm_comparison_operator"
                       [(match_operand 2 "cc_register" "") (const_int 0)])
                      (label_ref (match_operand 0 "" ""))
                      (pc)))]
  "TARGET_32BIT"
  "*
  if (arm_ccfsm_state == 1 || arm_ccfsm_state == 2)
    {
      arm_ccfsm_state += 2;
      return \"\";
    }
  return \"b%d1\\t%l0\";
  "
  [(set_attr "conds" "use")
   (set_attr "type" "branch")]
)

---

NB, I'm still not sure how I can get away without defining two maverick
modes, one for FP and one for 64-bit comparisons...