Hello Andreas,
Hello Jeff,
I have recently started on implementing processor pipeline model for
m68k target. At this point I am trying to figure out the best way of
annotating instructions in m68k.md, so that appropriate cpu unit
reservations could be assigned to each one of them.
The problem is that about half of all define_insns in m68k.md expands
into different sequences of asm instructions, and the sequences
themselves can vary in length. Does such an approach to write a machine
description allow to fine tune emitted code for a particular processor
or is it mostly a legacy of m68k being one of the first ports?
Considering the issue itself, there are two paths to follow:
1. Preserve the machine description the way it is and workaround the
issue with compound insns somehow.
2. Simplify machine description by splitting all compound insns into
simple equivalents.
Option '1' will likely lead to some complex scheme of annotating
compound instructions with reservations like "insn1_wait_insn2_insn3",
which won't be very manageable in the future. Also, obfuscated design
won't contribute to ease of tuning of the scheduler.
Option '2' looks more favorable to me, though implies greater initial
effort of simplifying complex machine description without loosing
precious bits of fine tuning. Following this path define_split will be
my best friend and helper.
Which option would you prefer? Or maybe I'm just missing something?
Thanks,
Maxim
