Hello,

I have used -da and -dv to produce vcg files of the CFG of this simple program:

int main(int argc, char**argv)
{
       if(argc)
               printf("positive\n");
       else
               printf("zero\n");

       return 0;
}

I have expected to get a CFG as follows:

                -----------
                | BB 0 |
                -----------
             /              \
  -----------                 -----------
  | BB 1 |                  | BB 2 |
  -----------                 -----------
             \              /
                -----------
                | END |
                -----------

But instead, I was surprised to get this CFG:

                -----------
                | BB 0 |
                -----------
             /              \
  -----------                 -----------
  | BB 1 |  ------------> | BB 2 |
  -----------                 -----------
             \              /
                -----------
                | END |
                -----------

as if one case of the "if" can lead to the other !

Can someone please explain to me why it is so ?

I am attaching the VCG representation, the VCG text file, and the original
test program..

Thank You
sunzir

<<attachment: CFG.JPG>>

#include <stdio.h>

int main(int argc, char**argv)
{
        if(argc)
                printf("positive\n");
        else
                printf("zero\n");

        return 0;
}

graph: {
port_sharing: no
graph: { title: "main"
folding: 1
hidden: 2
node: { title: "main.0" }
graph: {
title: "main.BB0"
folding: 1
color: lightblue
label: "basic block 0"

edge: { sourcename: "main.0" targetname: "main.11" color: blue }
node: {
  title: "main.11"
  color: lightgrey
  label: "note 11
 NOTE_INSN_BASIC_BLOCK"
}
edge: { sourcename: "main.11" targetname: "main.50" }
node: {
  title: "main.50"
  color: green
  label: "insn 50
(set (reg:SI 2 cx)
    (plus:SI (reg/f:SI 7 sp)
        (const_int 4 [0x4])))
"
}
edge: { sourcename: "main.50" targetname: "main.51" }
node: {
  title: "main.51"
  color: green
  label: "insn 51
(parallel [
        (set (reg/f:SI 7 sp)
            (and:SI (reg/f:SI 7 sp)
                (const_int -16 [0xfffffff0])))
        (clobber (reg:CC 17 flags))
    ])
"
}
edge: { sourcename: "main.51" targetname: "main.52" }
node: {
  title: "main.52"
  color: green
  label: "insn 52
(set (mem:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A8])
    (mem/c:SI (plus:SI (reg:SI 2 cx)
            (const_int -4 [0xfffffffc])) [7 S4 A8]))
"
}
edge: { sourcename: "main.52" targetname: "main.53" }
node: {
  title: "main.53"
  color: green
  label: "insn 53
(set (mem:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A8])
    (reg/f:SI 6 bp))
"
}
edge: { sourcename: "main.53" targetname: "main.54" }
node: {
  title: "main.54"
  color: green
  label: "insn 54
(set (reg/f:SI 6 bp)
    (reg/f:SI 7 sp))
"
}
edge: { sourcename: "main.54" targetname: "main.55" }
node: {
  title: "main.55"
  color: green
  label: "insn 55
(set (mem:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A8])
    (reg:SI 2 cx))
"
}
edge: { sourcename: "main.55" targetname: "main.56" }
node: {
  title: "main.56"
  color: green
  label: "insn 56
(parallel [
        (set (reg/f:SI 7 sp)
            (plus:SI (reg/f:SI 7 sp)
                (const_int -4 [0xfffffffc])))
        (clobber (reg:CC 17 flags))
        (clobber (mem:BLK (scratch) [0 A8]))
    ])
"
}
edge: { sourcename: "main.56" targetname: "main.66" }
node: {
  title: "main.66"
  color: green
  label: "insn 66
(set (reg:SI 0 ax)
    (mem/c/i:SI (reg:SI 2 cx [59]) [2 argc+0 S4 A32]))
"
}
edge: { sourcename: "main.66" targetname: "main.67" }
node: {
  title: "main.67"
  color: green
  label: "insn 67
(set (reg:CCZ 17 flags)
    (compare:CCZ (reg:SI 0 ax)
        (const_int 0 [0x0])))
"
}
edge: { sourcename: "main.67" targetname: "main.15" }
node: {
  title: "main.15"
  color: darkgreen
  label: "jump_insn 15
(set (pc)
    (if_then_else (eq (reg:CCZ 17 flags)
            (const_int 0 [0x0]))
        (label_ref 23)
        (pc)))
"
}
}
edge: { sourcename: "main.15" targetname: "main.23" color: blue }
edge: { sourcename: "main.15" targetname: "main.17" color: blue }
edge: { sourcename: "main.15" targetname: "main.19" }
graph: {
title: "main.BB1"
folding: 1
color: lightblue
label: "basic block 1"

node: {
  title: "main.17"
  color: lightgrey
  label: "note 17
 NOTE_INSN_BASIC_BLOCK"
}
edge: { sourcename: "main.17" targetname: "main.19" }
node: {
  title: "main.19"
  color: green
  label: "insn 19
(set (mem:SI (reg/f:SI 7 sp) [0 S4 A32])
    (symbol_ref/f:SI (\"*.LC0\") [flags 0x2] <string_cst 0xb7d11520>))
"
}
edge: { sourcename: "main.19" targetname: "main.20" }
node: {
  title: "main.20"
  color: darkgreen
  label: "call_insn 20
(set (reg:SI 0 ax)
    (call (mem:QI (symbol_ref:SI (\"puts\") [flags 0x41] <function_decl 
0xb7ca0000 __builtin_puts>) [0 S1 A8])
        (const_int 4 [0x4])))
"
}
edge: { sourcename: "main.20" targetname: "main.59" }
node: {
  title: "main.59"
  color: green
  label: "insn 59
(parallel [
        (set (reg/f:SI 7 sp)
            (plus:SI (reg/f:SI 7 sp)
                (const_int 4 [0x4])))
        (clobber (reg:CC 17 flags))
        (clobber (mem:BLK (scratch) [0 A8]))
    ])
"
}
edge: { sourcename: "main.59" targetname: "main.65" }
node: {
  title: "main.65"
  color: green
  label: "insn 65
(parallel [
        (set (reg/i:SI 0 ax [ <result> ])
            (const_int 0 [0x0]))
        (clobber (reg:CC 17 flags))
    ])
"
}
edge: { sourcename: "main.65" targetname: "main.60" }
node: {
  title: "main.60"
  color: green
  label: "insn 60
(parallel [
        (set (reg:SI 2 cx)
            (mem:SI (reg/f:SI 7 sp) [0 S4 A8]))
        (set (reg/f:SI 7 sp)
            (plus:SI (reg/f:SI 7 sp)
                (const_int 4 [0x4])))
    ])
"
}
edge: { sourcename: "main.60" targetname: "main.42" }
node: {
  title: "main.42"
  color: green
  label: "insn 42
(use (reg/i:SI 0 ax [ <result> ]))
"
}
edge: { sourcename: "main.42" targetname: "main.61" }
node: {
  title: "main.61"
  color: green
  label: "insn 61
(parallel [
        (set (reg/f:SI 6 bp)
            (mem:SI (reg/f:SI 7 sp) [0 S4 A8]))
        (set (reg/f:SI 7 sp)
            (plus:SI (reg/f:SI 7 sp)
                (const_int 4 [0x4])))
    ])
"
}
edge: { sourcename: "main.61" targetname: "main.82" }
node: {
  title: "main.82"
  color: green
  label: "insn 82
(set (reg/f:SI 7 sp)
    (plus:SI (reg:SI 2 cx)
        (const_int -4 [0xfffffffc])))
"
}
edge: { sourcename: "main.82" targetname: "main.63" }
node: {
  title: "main.63"
  color: darkgreen
  label: "jump_insn 63
(return)
"
}
}
edge: { sourcename: "main.63" targetname: "main.999999" color: blue }
edge: { sourcename: "main.63" targetname: "main.23" color: green class: 3 }
graph: {
title: "main.BB2"
folding: 1
color: lightblue
label: "basic block 2"

node: {
  title: "main.23"
  color: darkgrey
  shape: ellipse
  label: "code_label 23
 2 2 \"\" [1 uses]
"
}
edge: { sourcename: "main.23" targetname: "main.26" }
node: {
  title: "main.26"
  color: green
  label: "insn 26
(set (mem:SI (reg/f:SI 7 sp) [0 S4 A32])
    (symbol_ref/f:SI (\"*.LC1\") [flags 0x2] <string_cst 0xb7d115a0>))
"
}
edge: { sourcename: "main.26" targetname: "main.27" }
node: {
  title: "main.27"
  color: darkgreen
  label: "call_insn 27
(set (reg:SI 0 ax)
    (call (mem:QI (symbol_ref:SI (\"puts\") [flags 0x41] <function_decl 
0xb7ca0000 __builtin_puts>) [0 S1 A8])
        (const_int 4 [0x4])))
"
}
edge: { sourcename: "main.27" targetname: "main.73" }
node: {
  title: "main.73"
  color: green
  label: "insn 73
(parallel [
        (set (reg/f:SI 7 sp)
            (plus:SI (reg/f:SI 7 sp)
                (const_int 4 [0x4])))
        (clobber (reg:CC 17 flags))
        (clobber (mem:BLK (scratch) [0 A8]))
    ])
"
}
edge: { sourcename: "main.73" targetname: "main.71" }
node: {
  title: "main.71"
  color: green
  label: "insn 71
(parallel [
        (set (reg/i:SI 0 ax [ <result> ])
            (const_int 0 [0x0]))
        (clobber (reg:CC 17 flags))
    ])
"
}
edge: { sourcename: "main.71" targetname: "main.74" }
node: {
  title: "main.74"
  color: green
  label: "insn 74
(parallel [
        (set (reg:SI 2 cx)
            (mem:SI (reg/f:SI 7 sp) [0 S4 A8]))
        (set (reg/f:SI 7 sp)
            (plus:SI (reg/f:SI 7 sp)
                (const_int 4 [0x4])))
    ])
"
}
edge: { sourcename: "main.74" targetname: "main.72" }
node: {
  title: "main.72"
  color: green
  label: "insn 72
(use (reg/i:SI 0 ax [ <result> ]))
"
}
edge: { sourcename: "main.72" targetname: "main.75" }
node: {
  title: "main.75"
  color: green
  label: "insn 75
(parallel [
        (set (reg/f:SI 6 bp)
            (mem:SI (reg/f:SI 7 sp) [0 S4 A8]))
        (set (reg/f:SI 7 sp)
            (plus:SI (reg/f:SI 7 sp)
                (const_int 4 [0x4])))
    ])
"
}
edge: { sourcename: "main.75" targetname: "main.81" }
node: {
  title: "main.81"
  color: green
  label: "insn 81
(set (reg/f:SI 7 sp)
    (plus:SI (reg:SI 2 cx)
        (const_int -4 [0xfffffffc])))
"
}
edge: { sourcename: "main.81" targetname: "main.77" }
node: {
  title: "main.77"
  color: darkgreen
  label: "jump_insn 77
(return)
"
}
}
edge: { sourcename: "main.77" targetname: "main.999999" color: blue }
edge: { sourcename: "main.77" targetname: "main.999999" color: green class: 3 }
node: { title: "main.999999" label: "END" }
}
}

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