Hi,
I want to introduce a __int40 data type in my port for 40 bits integers. I
do:
type = make_signed_type(40);
lang_hooks.types.register_builtin_type(type, "__int40");
The result is that __int40 variables are mapped on DImode with all kinds of
shifts and ands to obtain a 40 bits data type. Is there a way to avoid this?
I want to allocate these __int40 data to dedicated 40 bits registers. I
tried to
add some peepholes to remove the redundant shifts and ands but that does
not help in all cases. It is also not a nice solution for this problem. So
does anyone know a better solution?
I also tried to use the partial DI mode type but that did not work well.
Jan
