>> (define_insn "loadsf"
>> [(set (match_operand:SF 0 "register_operand" "=r")
>> (mem:SF (match_operand:SI 1 "immediate_operand" "m")))]
>This makes no sense, because the constraint means that the mem's
operand is >an immediate before reload (and you want it to be a
register), and a mem after >reload. What you want is something like
>(mem:SF (match_operand:SI 1 "general_operand" "r")))]
>which means "the address can be a general operand, but after reload
we only >accept registers here", or
>(mem:SF (match_operand:SI 1 "register_operand" "r")))]
>Paolo
Hey,
Thanks. It seems work now. But... when I define the like insn for QImode,
(define_insn "loadqi_men"
[(set (match_operand:QI 0 "register_operand" "=r")
(mem:QI (match_operand:SI 1 "general_operand" "r")))]
""
"lbu.u\t%0,0(%1)"
)
The compiler comes out such error,
error: insn does not satisfy its constraints
(insn 349 53 46 4 ../../gcc-3.4.4/gcc/unwind-pe.h:212 (set (reg:QI 1 $1)
(mem/s:QI (plus:SI (reg/v/f:SI 9 $9 [orig:154 p ] [154])
(const_int 1 [0x1])) [12 S1 A8])) 45 {} (nil)
(nil))
Well, it seems not work.
Eric.
