I have a question about GCC's handling of the condition codes (specifically 
the CF, ZF, NF, OF, PF bits in bits in EFLAGS) on the i386 that will 
hopefully be trivial to anyone familiar with the implementation of the i386 
target.  My impression is that GCC generally treats the i386 condition codes 
as a single pseudo-register, which some instructions change (e.g., ADD) and 
others don't (e.g., MOV).  But some i386 instructions change only some 
condition code bits while leaving other bits unchanged (e.g., INC/DEC, which 
leave CF unchanged).

My question: does GCC-generated code ever actually depend on this aspect of 
the x86 architecture - i.e., on instructions that architecturally change some 
but not all condition codes _not_ changing those bits that they're not 
supposed to change?  In other words, if the i386 architecture were suddenly 
to be modified so that all instructions that traditionally affect only some 
of the condition code bits suddenly instead affect _all_ condition code 
flags, would GCC-generated code care at all?  Would the i386 backend have to 
be changed?  My impression is the answer is no, but I'm not deeply familiar 
with the i386 backend enough to be sure.

Thanks very much!
Bryan

Reply via email to