Good evening,
I need help understanding where some RTX comes from.
In my target.md I have the following expansion:
(define_expand "smaxsf3"
[(parallel [(set (match_dup 3)
(unspec:SI [(match_operand:SF 1 "register_operand" "")
(match_operand:SF 2 "reg_or_0_operand" "")]
UNSPEC_CMP_F))
(clobber (reg:SI REG_PSW))])
(set (match_dup 3)
(and:SI (match_dup 3)
(match_dup 4)))
;; "*movsfcc.ne"
(set (match_operand:SF 0 "register_operand" "")
(if_then_else:SF (ne (match_dup 3)
(const_int 0))
(match_dup 1)
(match_dup 2)))]
"TARGET_USE_FPU"
{
printf("here1");
operands[3] = gen_reg_rtx (SImode);
operands[4] = gen_int_mode (1 << CMP_F_GT, SImode);
})
TARGET_USE_FPU is driven by a flag I wrote (msoft-float), and when it
evaluates to false I get the following RTX after RTL expand:
(note 6 1 2 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
(insn 2 6 3 2 (set (reg/v:SF 41 [ a ])
(reg:SF 4 d4 [ a ])) "../test.c":11:19 -1
(nil))
(note 3 2 8 2 NOTE_INSN_FUNCTION_BEG)
(insn 8 3 9 2 (set (reg:SF 42)
(const_double:SF 0.0 [0x0.0p+0])) "../test.c":12:4 -1
(nil))
(insn 9 8 10 2 (parallel [
(set (reg:SI 43)
(unspec:SI [
(reg/v:SF 41 [ a ])
(reg:SF 42)
] UNSPEC_CMP_F))
(clobber (reg:SI 33 PSW))
]) "../test.c":12:4 -1
(nil))
(insn 10 9 11 2 (set (reg:SI 43)
(ior:SI (zero_extract:SI (reg:SI 43)
(const_int 1 [0x1])
(const_int 2 [0x2]))
(zero_extract:SI (reg:SI 43)
(const_int 1 [0x1])
(const_int 2 [0x2])))) "../test.c":12:4 -1
(nil))
(jump_insn 11 10 12 2 (set (pc)
(if_then_else (ne (reg:SI 43)
(const_int 0 [0]))
(label_ref:SI 24)
(pc))) "../test.c":12:4 162 {*bne}
(int_list:REG_BR_PROB 633507684 (nil))
-> 24)
>From what I understand, the define_expand "smaxsf3" is used to produce the
RTL above. Am I right? Why does it happen, even if the condition for the
define_expand evaluates to false?
Thank you
Enrico Bragante
