I am porting gcc to a new platform which is supported vector arithmetic
operations.
(I'm using the latest 4.0.x snapshot version and upgrading it every week.)
Currently, we can write the following multiply-accumulation RTL template for
non-vector type:
[(set (match_operand:DI 0 "register_operand" "=r")
(plus:DI
(mult:DI (sign_extend:DI (match_operand:SI 2 "register_operand" "r"))
(sign_extend:DI (match_operand:SI 3 "register_operand" "r")))
(match_operand:DI 1 "register_operand" "r")))]
That instruction pattern will match the following C code:
long long x;
int a = 10, b = 9;
y = x + (long long)a * (long long)b;
In this platform, the multiply-accumulation operations has 2 steps:
1. load 64-bit value to accumulator (ex. macld d0, d1)
2. do the multiply-accumulation N times with two 32-bit registers (ex.
madd d2, d3)
The machine will evaluate (d0, d1) + d2 * d3.
Thus, the above RTL template used (sign_extend:DI (reg:SI x)).
Now I trying to apply the same way to vector modes, such as:
[(set (match_operand:V2SI 0 "register_operand" "=r")
(plus:V2SI
(mult:V2SI (sign_extend:V2SI (match_operand:V2HI 2 "register_operand"
"r"))
(sign_extend:V2SI (match_operand:V2HI 3 "register_operand"
"r")))
(match_operand:V2SI 1 "register_operand" "r")))]
And I wrote the following C code with GNU C extensions:
typedef char v2hi __attribute__((vector_size(4)));
typedef char v2si __attribute__((vector_size(8)));
v2si x;
v2hi a = {1, 2}, b = {3, 4};
y = x + (v2si)a * (v2si)b;
I know a vector type couldn't cast/convert to the type with different vector
size,
but I want to treat the `casting/converting' operations as `extending'
operations.
Are there any solutions for this situation?
Thanks a lot.
