I'm preparing the third part of the reduction support for mainline,
introducing vector shifts (see
http://gcc.gnu.org/ml/gcc-patches/2005-06/msg01317.html). The vectorizer
generates the following epilog code:
vect_var_.53_60 = vect_var_.50_59 v>> 64;
vect_var_.53_61 = vect_var_.50_59 + vect_var_.53_60;
vect_var_.53_62 = vect_var_.53_61 v>> 32;
vect_var_.53_63 = vect_var_.53_61 + vect_var_.53_62;
vect_var_.52_64 = BIT_FIELD_REF <vect_var_.53_63, 32, 96>;
and the next pass, vec_lower2 transforms that into the following:
D.2057_108 = BIT_FIELD_REF <vect_var_.50_59, 32, 0>;
D.2058_109 = BIT_FIELD_REF <64, 32, 0>;
D.2059_110 = D.2057_108 v>> D.2058_109;
D.2060_111 = BIT_FIELD_REF <vect_var_.50_59, 32, 32>;
D.2061_112 = BIT_FIELD_REF <64, 32, 32>;
D.2062_113 = D.2060_111 v>> D.2061_112;
D.2063_114 = BIT_FIELD_REF <vect_var_.50_59, 32, 64>;
D.2064_115 = BIT_FIELD_REF <64, 32, 64>;
D.2065_116 = D.2063_114 v>> D.2064_115;
D.2066_117 = BIT_FIELD_REF <vect_var_.50_59, 32, 96>;
D.2067_118 = BIT_FIELD_REF <64, 32, 96>;
D.2068_119 = D.2066_117 v>> D.2067_118;
vect_var_.53_60 = {D.2059_110, D.2062_113, D.2065_116, D.2068_119};
vect_var_.53_61 = vect_var_.50_59 + vect_var_.53_60;
D.2069_120 = BIT_FIELD_REF <vect_var_.53_61, 32, 0>;
D.2070_121 = BIT_FIELD_REF <32, 32, 0>;
D.2071_122 = D.2069_120 v>> D.2070_121;
D.2072_123 = BIT_FIELD_REF <vect_var_.53_61, 32, 32>;
D.2073_124 = BIT_FIELD_REF <32, 32, 32>;
D.2074_125 = D.2072_123 v>> D.2073_124;
D.2075_126 = BIT_FIELD_REF <vect_var_.53_61, 32, 64>;
D.2076_127 = BIT_FIELD_REF <32, 32, 64>;
D.2077_128 = D.2075_126 v>> D.2076_127;
D.2078_129 = BIT_FIELD_REF <vect_var_.53_61, 32, 96>;
D.2079_130 = BIT_FIELD_REF <32, 32, 96>;
D.2080_131 = D.2078_129 v>> D.2079_130;
vect_var_.53_62 = {D.2071_122, D.2074_125, D.2077_128, D.2080_131};
vect_var_.53_63 = vect_var_.53_61 + vect_var_.53_62;
vect_var_.52_64 = BIT_FIELD_REF <vect_var_.53_63, 32, 96>;
why??
thanks,
dorit
