Hello! > Iam trying to merge the following two instructions
> 1. addu r2, r3,r4 > 2. ld r5 ,mem(r2) # load from address calculated > in the prev. instruction > in to one single isntruction. > 3. ldx r5 , mem(r3(r4)) # indexed load. > I managed to do it with a define_peephole pattern > in the md file. But I want this to happen only in the case > when the last use of register r2 is in statement2 (i.e it isn't > live after stmt 2.)otherwise the r2 value would go incorrect You could use peep2_reg_dead_p() or peep2_regno_dead_p() functions in define_peephole constraints. There are many examples of their use in i386.md. Uros.
