On 06/04/2014 05:37 AM, Kai Tietz wrote: > +(define_peephole2 > + [(set (match_operand:DI 0 "register_operand") > + (match_operand:DI 1 "memory_operand")) > + (call (mem:QI (match_operand:DI 2 "register_operand")) > + (match_operand 3))] > + "TARGET_64BIT && REG_P (operands[0]) > + && REG_P (operands[2]) > + && SIBLING_CALL_P (peep2_next_insn (1)) > + && REGNO (operands[0]) == REGNO (operands[2])" > + [(call (unspec [(mem:QI (match_dup 1))] UNSPEC_PEEPSIB) (match_dup 3))])
You can use (match_dup 0) instead of that (match_operand 2); that allows you to remove + && REG_P (operands[2]) + && REGNO (operands[0]) == REGNO (operands[2])" You don't need the + && REG_P (operands[2]) because of the register_operand constraint; all subregs will have been resolved at this point. You need a !TARGET_X32 check for your TARGET_64BIT patches, since the jmpq insn always reads 64-bits. > +(define_insn "*sibcall_pop_intern" > + [(call (unspec [(mem:QI (match_operand:SI 0 "memory_operand"))] > UNSPEC_PEEPSIB) Watch your line length (and line-wrapping when posting patches). Align the UNSPEC_PEEPSIB with the [. This, and the other following sibcall intern patterns, including > +(define_insn "*sibcall_value_intern" > +(define_insn "*sibcall_value_pop_intern" have no matching peephole2 patterns, and so will never be generated. You'll need more peep2's. r~
