On Fri, Feb 21, 2014 at 4:25 PM, Ilya Tocar <tocarip.in...@gmail.com> wrote:
>> > Latest version of AVX512 spec
>> > http://download-software.intel.com/sites/default/files/managed/50/1a/319433-018.pdf
>> > Has a few changes.
>> >
>> > 1)PREFETCHWT1 instruction now has separate CPUID bit PREFETCHWT1.
>> > We can either support new CPUID or disable PREFETCHWT1 from generating,
>> > without removing code, and enable it in 4.9.1/latest version.
>> > I am not sure that adding new -m flag and related stuff this late
>> > is a good idea. Should still add it?
>>
>> Please submit the patch anyway. We can relax release constraints on
>> non-algorithmic patch a bit, weighting in benefits of having gcc
>> release that fully conforms to some published specification.
>>
> Patch bellow add -mprefetchwt1 flag, corresponding TARGET_PREFETCHWT1,
> and uses them for prefetchwt1 instruction. Bootstraps/passes testing.
> Ok for trunk?
>
> ChangeLog:
>
> 2014-02-21 Ilya Tocar <ilya.to...@intel.com>
>
> * common/config/i386/i386-common.c (OPTION_MASK_ISA_PREFETCHWT1_SET),
> (OPTION_MASK_ISA_PREFETCHWT1_UNSET): New.
> (ix86_handle_option): Handle OPT_mprefetchwt1.
> * config/i386/cpuid.h (bit_PREFETCHWT1): New.
> * config/i386/driver-i386.c (host_detect_local_cpu): Detect
> PREFETCHWT1 CPUID.
> * config/i386/i386-c.c (ix86_target_macros_internal): Handle
> OPTION_MASK_ISA_PREFETCHWT1.
> * config/i386/i386.c (ix86_target_string): Handle mprefetchwt1.
> (PTA_PREFETCHWT1): New.
> (ix86_option_override_internal): Handle PTA_PREFETCHWT1.
> (ix86_valid_target_attribute_inner_p): Handle OPT_mprefetchwt1.
> * config/i386/i386.h (TARGET_PREFETCHWT1), (TARGET_PREFETCHWT1_P):
> New.
> * config/i386/i386.md (prefetch): Check TARGET_PREFETCHWT1
> (*prefetch_avx512pf_<mode>_: Change into ...
> (*prefetch_prefetchwt1_<mode>: This.
> * config/i386/i386.opt (mprefetchwt1): New.
> * config/i386/xmmintrin.h (_mm_hint): Add _MM_HINT_ET1.
> (_mm_prefetch): Handle intent to write.
> * doc/invoke.texi (mprefetchwt1), (mno-prefetchwt1): Doccument.
>
> And for tests:
>
> 2014-02-22 Ilya Tocar <ilya.to...@intel.com>
>
> * gcc.target/i386/avx-1.c: Update __builtin_prefetch.
> * gcc.target/i386/prefetchwt1-1.c: New.
> * gcc.target/i386/sse-13.c: Update __builtin_prefetch.
> * gcc.target/i386/sse-23.c: Ditto.
Please also add new switch to gcc-target/i386/sse-{12,13,14}.c and
g++.dg/other/i386-{2,3} and new options to
gcc.tatget/i386/sse-{22,23}.c. Please re-test with new additions and
repost the patch.
> @@ -17867,8 +17867,8 @@
> supported by SSE counterpart or the SSE prefetch is not available
> (K6 machines). Otherwise use SSE prefetch as it allows specifying
> of locality. */
> - if (TARGET_AVX512PF && write)
> - operands[2] = const1_rtx;
> + if (TARGET_PREFETCHWT1 && write)
> + operands[2] = GEN_INT (2);
you can use const2_rtx here.
Uros.
