On 10/09/2013 03:28 AM, Kirill Yukhin wrote: > +;; CPUID bit AVX512F enables evex encoded scalar and 512-bit fma. It doesn't > +;; care about FMA bit, so we enable fma for TARGET_AVX512F even when > TARGET_FMA > +;; and TARGET_FMA4 are both false.
How do you force an evex encoding of the instruction? Do you really mean that cpuid AVX512F, !FMA will not #OP for a vex (but not evex) encoded version of the same insn? r~
