On Mon, Aug 12, 2013 at 11:04 AM, Anna Tikhonova
<anna.m.tikhon...@gmail.com> wrote:
> Also, there should be an issue with -masm=intel for sse3_monitor. Please see
> attached patch.

We can just use "monitor" with implicit operands here, like in
attached patch. It should handle 32bit, 64bit and x32 targets with ATT
and Intel syntax.

Uros.
Index: i386.c
===================================================================
--- i386.c      (revision 201667)
+++ i386.c      (working copy)
@@ -4170,24 +4170,19 @@
       ix86_gen_leave = gen_leave_rex64;
       if (Pmode == DImode)
        {
-         ix86_gen_monitor = gen_sse3_monitor64_di;
          ix86_gen_tls_global_dynamic_64 = gen_tls_global_dynamic_64_di;
          ix86_gen_tls_local_dynamic_base_64
            = gen_tls_local_dynamic_base_64_di;
        }
       else
        {
-         ix86_gen_monitor = gen_sse3_monitor64_si;
          ix86_gen_tls_global_dynamic_64 = gen_tls_global_dynamic_64_si;
          ix86_gen_tls_local_dynamic_base_64
            = gen_tls_local_dynamic_base_64_si;
        }
     }
   else
-    {
-      ix86_gen_leave = gen_leave;
-      ix86_gen_monitor = gen_sse3_monitor;
-    }
+    ix86_gen_leave = gen_leave;
 
   if (Pmode == DImode)
     {
@@ -4199,6 +4194,7 @@
       ix86_gen_allocate_stack_worker = gen_allocate_stack_worker_probe_di;
       ix86_gen_adjust_stack_and_probe = gen_adjust_stack_and_probedi;
       ix86_gen_probe_stack_range = gen_probe_stack_rangedi;
+      ix86_gen_monitor = gen_sse3_monitor_di;
     }
   else
     {
@@ -4210,6 +4206,7 @@
       ix86_gen_allocate_stack_worker = gen_allocate_stack_worker_probe_si;
       ix86_gen_adjust_stack_and_probe = gen_adjust_stack_and_probesi;
       ix86_gen_probe_stack_range = gen_probe_stack_rangesi;
+      ix86_gen_monitor = gen_sse3_monitor_si;
     }
 
 #ifdef USE_IX86_CLD
Index: sse.md
===================================================================
--- sse.md      (revision 201667)
+++ sse.md      (working copy)
@@ -7781,21 +7781,12 @@
   "mwait"
   [(set_attr "length" "3")])
 
-(define_insn "sse3_monitor"
-  [(unspec_volatile [(match_operand:SI 0 "register_operand" "a")
-                    (match_operand:SI 1 "register_operand" "c")
-                    (match_operand:SI 2 "register_operand" "d")]
-                   UNSPECV_MONITOR)]
-  "TARGET_SSE3 && !TARGET_64BIT"
-  "monitor\t%0, %1, %2"
-  [(set_attr "length" "3")])
-
-(define_insn "sse3_monitor64_<mode>"
+(define_insn "sse3_monitor_<mode>"
   [(unspec_volatile [(match_operand:P 0 "register_operand" "a")
                     (match_operand:SI 1 "register_operand" "c")
                     (match_operand:SI 2 "register_operand" "d")]
                    UNSPECV_MONITOR)]
-  "TARGET_SSE3 && TARGET_64BIT"
+  "TARGET_SSE3"
 ;; 64bit version is "monitor %rax,%rcx,%rdx". But only lower 32bits in
 ;; RCX and RDX are used.  Since 32bit register operands are implicitly
 ;; zero extended to 64bit, we only need to set up 32bit registers.

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