Hi, the hardware transactional execution instructions in libitm are only enabled if actually supported by the assembler. So the option which enables the instructions in the assembler should only be set if we are already in a code path where we know the assembler can do it.
With the attached patch the ".machine" pseudo is used to enable the full instruction set. Bye, -Andreas- 2013-07-24 Andreas Krebbel <andreas.kreb...@de.ibm.com> * config/s390/target.h (htm_begin, htm_commit, htm_abort) (htm_transaction_active): Enable zEC12 instructions in the assembler. * configure.tgt: Remove -Wa,-march=zEC12 from XCFLAGS. --- libitm/config/s390/target.h | 4 ++++ libitm/configure.tgt | 2 !! 2 files changed, 4 insertions(+), 2 modifications(!) Index: libitm/config/s390/target.h =================================================================== *** libitm/config/s390/target.h.orig --- libitm/config/s390/target.h *************** htm_init () *** 85,90 **** --- 85,91 ---- static inline uint32_t htm_begin () { + __asm volatile (".machine \"all\" \n\t"); return __builtin_tbegin_nofloat (NULL); } *************** htm_begin_success (uint32_t begin_ret) *** 97,108 **** --- 98,111 ---- static inline void htm_commit () { + __asm volatile (".machine \"all\" \n\t"); __builtin_tend (); } static inline void htm_abort () { + __asm volatile (".machine \"all\" \n\t"); __builtin_tabort (_HTM_FIRST_USER_ABORT_CODE); } *************** htm_abort_should_retry (uint32_t begin_r *** 115,120 **** --- 118,124 ---- static inline bool htm_transaction_active () { + __asm volatile (".machine \"all\" \n\t"); return __builtin_tx_nesting_depth() != 0; } Index: libitm/configure.tgt =================================================================== *** libitm/configure.tgt.orig --- libitm/configure.tgt *************** case "${target_cpu}" in *** 109,115 **** ARCH=x86 ;; s390|s390x) ! XCFLAGS="${XCFLAGS} -mzarch -mhtm -Wa,-march=zEC12" ARCH=s390 ;; --- 109,115 ---- ARCH=x86 ;; s390|s390x) ! XCFLAGS="${XCFLAGS} -mzarch -mhtm" ARCH=s390 ;;