Hi guys, Could I ask several questions just to clarify the things up? 1) Does the root problem lay in the fact that even for scalar additions we perform the addition on the whole vector and only then drop the higher parts of the vector? I.e. to fix the test from the PR we need to replace plus on vector mode with plus on scalar mode?
2) Is one of the main requirements having the same pattern for V4SF and V2DF version? 3) I don't see vec_concat in patterns from your patches, is it explicitly generated by some x86-expander? Anyway, I really like the idea of having some uniformity in describing patterns for scalar instructions, so thank you for the work! On 6 December 2012 17:42, Kirill Yukhin <kirill.yuk...@gmail.com> wrote: >>> Yes, the approach taken in this patch looks really good to me. There >>> should be no code differences with your patch, but let's ask HJ for >>> his opinion on intrinsics header changes. >> >> Hi Kirill, >> >> Can you take a look? Thanks. > > Hi guys, I like changes in intrinsics header. > > Thanks, K -- --- Best regards, Michael V. Zolotukhin, Software Engineer Intel Corporation.
