On Tue, Dec 4, 2012 at 5:28 PM, Marc Glisse <marc.gli...@inria.fr> wrote: > On Tue, 4 Dec 2012, Marc Glisse wrote: > >> Do you agree? > > > Like this ? (only tested on the new testcases, and then I'd need to ask Eric > his opinion) > > 2012-12-04 Marc Glisse <marc.gli...@inria.fr> > > PR target/54855 > gcc/ > * simplify-rtx.c (simplify_binary_operation_1) <VEC_CONCAT>: Replace > with VEC_MERGE. > > * config/i386/sse.md (<sse>_vm<plusminus_insn><mode>3): Rewrite > pattern. > * config/i386/i386-builtin-types.def: New function types. > * config/i386/i386.c (ix86_expand_args_builtin): Likewise. > (bdesc_args) <__builtin_ia32_addss, __builtin_ia32_subss, > __builtin_ia32_addsd, __builtin_ia32_subsd>: Change prototype. > * config/i386/xmmintrin.h: Adapt to new builtin prototype. > * config/i386/emmintrin.h: Likewise. > * doc/extend.texi (X86 Built-in Functions): Document changed > prototype. > > > testsuite/ > * gcc.target/i386/pr54855-1.c: New testcase. > * gcc.target/i386/pr54855-2.c: New testcase.
Yes, the approach taken in this patch looks really good to me. There should be no code differences with your patch, but let's ask HJ for his opinion on intrinsics header changes. A little nit below: > + rtx newop0 = gen_rtx_fmt_e (VEC_DUPLICATE, mode, trueop0); > + rtx newop1 = XEXP (trueop1, 0); > + return simplify_gen_ternary (VEC_MERGE, mode, GET_MODE (newop0), > + newop0, newop1, GEN_INT (1)); You can use const1_rtx here. Thanks, Uros.
