AMD General Hi,
> -----Original Message----- > From: Haochen Jiang <[email protected]> > Sent: 19 August 2026 11:19 > To: [email protected] > Cc: [email protected]; [email protected]; Kumar, Venkataramanan > <[email protected]>; Sharma, Dipesh > <[email protected]>; Sharma, Dipesh <[email protected]> > Subject: [PATCH v2 4/7] Support ACEv1 instructions reused from AMX-TILE > +#ifndef _IMMINTRIN_H_INCLUDED > +#error "Never use <acev1intrin.h> directly; include <immintrin.h> instead." > +#endif > + > +#ifndef _ACEV1INTRIN_H_INCLUDED > +#define _ACEV1INTRIN_H_INCLUDED > + > +#if !defined(__ACEV1__) > +#pragma GCC push_options > +#pragma GCC target("acev1") > +#define __DISABLE_ACEV1__ > +#endif /* __ACEV1__ */ > + > +#if defined(__x86_64__) > + > +#define _tile_ace_loadconfig(A) \ > + __builtin_ia32_ldtilecfg (A) > + > +#define _tile_ace_storeconfig(A) \ > + __builtin_ia32_sttilecfg (A) > + Can we prefer to use functional intrins here for the load and store just like amx-tile does ? > +extern __inline void > +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) > +_tile_ace_release (void) > +{ > + __asm__ volatile ("tilerelease" ::); > +} Since we aim to use builtins for all the instructions, is it possible to not implement this in inline assembly and use a builtin instead? > + > +#ifdef __OPTIMIZE__ > +extern __inline void > +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) > +_tile_ace_zero (const int __A) > +{ > + __builtin_ia32_tilezero (__A); > +} > + > +#else Thanks, Dipesh
