This adds minimal support for the Ssccfg[1] (Supervisor-mode counter configuration) extension, which depends on Sscsrind.
[1] https://github.com/riscvarchive/riscv-smcdeleg-ssccfg gcc/ChangeLog: * config/riscv/riscv-ext.def (ssccfg): Add new extension. * config/riscv/riscv-ext.opt: Ditto. * doc/riscv-ext.texi: Ditto. gcc/testsuite/ChangeLog: * gcc.target/riscv/ssccfg-version.c: New test. --- gcc/config/riscv/riscv-ext.def | 13 +++++++++++++ gcc/config/riscv/riscv-ext.opt | 2 ++ gcc/doc/riscv-ext.texi | 4 ++++ gcc/testsuite/gcc.target/riscv/ssccfg-version.c | 15 +++++++++++++++ 4 files changed, 34 insertions(+) create mode 100644 gcc/testsuite/gcc.target/riscv/ssccfg-version.c diff --git a/gcc/config/riscv/riscv-ext.def b/gcc/config/riscv/riscv-ext.def index e84ef896a8d..c10b0f29543 100644 --- a/gcc/config/riscv/riscv-ext.def +++ b/gcc/config/riscv/riscv-ext.def @@ -1871,6 +1871,19 @@ DEFINE_RISCV_EXT( /* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED, /* EXTRA_EXTENSION_FLAGS */ 0) +DEFINE_RISCV_EXT( + /* NAME */ ssccfg, + /* UPPERCASE_NAME */ SSCCFG, + /* FULL_NAME */ "Supervisor-mode counter configuration extension", + /* DESC */ "", + /* URL */ , + /* DEP_EXTS */ ({"sscsrind"}), + /* SUPPORTED_VERSIONS */ ({{1, 0}}), + /* FLAG_GROUP */ ss, + /* BITMASK_GROUP_ID */ BITMASK_NOT_YET_ALLOCATED, + /* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED, + /* EXTRA_EXTENSION_FLAGS */ 0) + DEFINE_RISCV_EXT( /* NAME */ ssccptr, /* UPPERCASE_NAME */ SSCCPTR, diff --git a/gcc/config/riscv/riscv-ext.opt b/gcc/config/riscv/riscv-ext.opt index d70fae0c1e3..79e1cce72e2 100644 --- a/gcc/config/riscv/riscv-ext.opt +++ b/gcc/config/riscv/riscv-ext.opt @@ -377,6 +377,8 @@ Mask(SMDBLTRP) Var(riscv_sm_subext) Mask(SSAIA) Var(riscv_ss_subext) +Mask(SSCCFG) Var(riscv_ss_subext) + Mask(SSCCPTR) Var(riscv_ss_subext) Mask(SSCOFPMF) Var(riscv_ss_subext) diff --git a/gcc/doc/riscv-ext.texi b/gcc/doc/riscv-ext.texi index b7f7982aa13..41ba6831e8e 100644 --- a/gcc/doc/riscv-ext.texi +++ b/gcc/doc/riscv-ext.texi @@ -554,6 +554,10 @@ @tab 1.0 @tab Advanced interrupt architecture extension for supervisor mode +@item @samp{ssccfg} +@tab 1.0 +@tab Supervisor-mode counter configuration extension + @item @samp{ssccptr} @tab 1.0 @tab Main memory supports page table reads diff --git a/gcc/testsuite/gcc.target/riscv/ssccfg-version.c b/gcc/testsuite/gcc.target/riscv/ssccfg-version.c new file mode 100644 index 00000000000..9a1b3194fd5 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/ssccfg-version.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-mriscv-attribute -march=rv64i_ssccfg1p0 -mabi=lp64" { target { rv64 } } } */ +/* { dg-options "-mriscv-attribute -march=rv32i_ssccfg1p0 -mabi=ilp32" { target { rv32 } } } */ + +#ifndef __riscv_ssccfg +#error "Feature macro for 'ssccfg' not defined" +#endif + +int +foo (void) +{ + return 0; +} + +/* { dg-final { scan-assembler ".attribute arch, .*ssccfg1p0" } } */ -- 2.43.0
