Hi!
The following 4 define_insns don't have matching operands between AT&T and
Intel syntax, %3 is "0" and %1 was missing.
Searched grep '%0%{%4%}|%0%{%4%}' *.md and didn't find other spots where
the operand numbers wouldn't match (reverse order of course).
Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?
2026-03-03 Jakub Jelinek <[email protected]>
PR target/124315
* config/i386/sse.md (avx512f_vmfmadd_<mode>_mask3<round_name>,
avx512f_vmfmsub_<mode>_mask3<round_name>,
avx512f_vmfnmadd_<mode>_mask3<round_name>,
avx512f_vmfnmsub_<mode>_mask3<round_name>): Use %<iptr>1 instead of
%<iptr>3 in -masm=intel syntax.
* gcc.target/i386/avx512f-pr124315.c: New test.
--- gcc/config/i386/sse.md.jj 2026-03-02 20:08:37.596847221 +0100
+++ gcc/config/i386/sse.md 2026-03-02 21:43:49.817516970 +0100
@@ -7036,7 +7036,7 @@ (define_insn "avx512f_vmfmadd_<mode>_mas
(match_dup 3)
(const_int 1)))]
"TARGET_AVX512F"
- "vfmadd231<ssescalarmodesuffix>\t{<round_op5>%2, %1, %0%{%4%}|%0%{%4%},
%<iptr>3, %<iptr>2<round_op5>}"
+ "vfmadd231<ssescalarmodesuffix>\t{<round_op5>%2, %1, %0%{%4%}|%0%{%4%},
%<iptr>1, %<iptr>2<round_op5>}"
[(set_attr "type" "ssemuladd")
(set_attr "prefix" "evex")
(set_attr "mode" "<MODE>")])
@@ -7110,7 +7110,7 @@ (define_insn "avx512f_vmfmsub_<mode>_mas
(match_dup 3)
(const_int 1)))]
"TARGET_AVX512F"
- "vfmsub231<ssescalarmodesuffix>\t{<round_op5>%2, %1, %0%{%4%}|%0%{%4%},
%<iptr>3, %<iptr>2<round_op5>}"
+ "vfmsub231<ssescalarmodesuffix>\t{<round_op5>%2, %1, %0%{%4%}|%0%{%4%},
%<iptr>1, %<iptr>2<round_op5>}"
[(set_attr "type" "ssemuladd")
(set_attr "prefix" "evex")
(set_attr "mode" "<MODE>")])
@@ -7171,7 +7171,7 @@ (define_insn "avx512f_vmfnmadd_<mode>_ma
(match_dup 3)
(const_int 1)))]
"TARGET_AVX512F"
- "vfnmadd231<ssescalarmodesuffix>\t{<round_op5>%2, %1, %0%{%4%}|%0%{%4%},
%<iptr>3, %<iptr>2<round_op5>}"
+ "vfnmadd231<ssescalarmodesuffix>\t{<round_op5>%2, %1, %0%{%4%}|%0%{%4%},
%<iptr>1, %<iptr>2<round_op5>}"
[(set_attr "type" "ssemuladd")
(set_attr "prefix" "evex")
(set_attr "mode" "<MODE>")])
@@ -7248,7 +7248,7 @@ (define_insn "*avx512f_vmfnmsub_<mode>_m
(match_dup 3)
(const_int 1)))]
"TARGET_AVX512F"
- "vfnmsub231<ssescalarmodesuffix>\t{<round_op5>%2, %1, %0%{%4%}|%0%{%4%},
%<iptr>3, %<iptr>2<round_op5>}"
+ "vfnmsub231<ssescalarmodesuffix>\t{<round_op5>%2, %1, %0%{%4%}|%0%{%4%},
%<iptr>1, %<iptr>2<round_op5>}"
[(set_attr "type" "ssemuladd")
(set_attr "prefix" "evex")
(set_attr "mode" "<MODE>")])
--- gcc/testsuite/gcc.target/i386/avx512f-pr124315.c.jj 2026-03-02
22:26:00.983314657 +0100
+++ gcc/testsuite/gcc.target/i386/avx512f-pr124315.c 2026-03-02
22:25:38.048697082 +0100
@@ -0,0 +1,33 @@
+/* PR target/124315 */
+/* { dg-do compile { target masm_intel } } */
+/* { dg-options "-O2 -mavx512f -masm=intel" } */
+/* { dg-final { scan-assembler "\tvfmadd231sd\txmm0{k\[0-7]}, xmm1, xmm2,
{ru-sae}" } } */
+/* { dg-final { scan-assembler "\tvfmsub231sd\txmm0{k\[0-7]}, xmm1, xmm2,
{ru-sae}" } } */
+/* { dg-final { scan-assembler "\tvfnmadd231sd\txmm0{k\[0-7]}, xmm1, xmm2,
{ru-sae}" } } */
+/* { dg-final { scan-assembler "\tvfnmsub231sd\txmm0{k\[0-7]}, xmm1, xmm2,
{ru-sae}" } } */
+
+#include <x86intrin.h>
+
+__m128d
+foo (__m128d b, __m128d w, __m128d a, __mmask8 u)
+{
+ return _mm_mask3_fmadd_round_sd (w, a, b, u, _MM_FROUND_TO_POS_INF |
_MM_FROUND_NO_EXC);
+}
+
+__m128d
+bar (__m128d b, __m128d w, __m128d a, __mmask8 u)
+{
+ return _mm_mask3_fmsub_round_sd (w, a, b, u, _MM_FROUND_TO_POS_INF |
_MM_FROUND_NO_EXC);
+}
+
+__m128d
+baz (__m128d b, __m128d w, __m128d a, __mmask8 u)
+{
+ return _mm_mask3_fnmadd_round_sd (w, a, b, u, _MM_FROUND_TO_POS_INF |
_MM_FROUND_NO_EXC);
+}
+
+__m128d
+qux (__m128d b, __m128d w, __m128d a, __mmask8 u)
+{
+ return _mm_mask3_fnmsub_round_sd (w, a, b, u, _MM_FROUND_TO_POS_INF |
_MM_FROUND_NO_EXC);
+}
Jakub
