Hi!
The Intel syntax part is missing % before 3, so it always prints {3}
rather than {k1} or similar.
Fixed thusly, bootstrapped/regtested on x86_64-linux and i686-linux, ok for
trunk?
2026-03-03 Jakub Jelinek <[email protected]>
PR target/124335
* config/i386/sse.md (*avx512f_load<mode>_mask): Use %{%3%} instead of
%{3%} for -masm=intel syntax.
* gcc.target/i386/avx512fp16-pr124335.c: New test.
--- gcc/config/i386/sse.md.jj 2026-03-02 15:42:37.301524399 +0100
+++ gcc/config/i386/sse.md 2026-03-02 20:08:37.596847221 +0100
@@ -1744,7 +1744,7 @@ (define_insn "*avx512f_load<mode>_mask"
(match_operand:<ssevecmode> 4 "const0_operand")
(const_int 1)))]
"TARGET_AVX512F"
- "vmov<ssescalarmodesuffix>\t{%1, %0%{%3%}%N2|%0%{3%}%N2, %1}"
+ "vmov<ssescalarmodesuffix>\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}"
[(set_attr "type" "ssemov")
(set_attr "prefix" "evex")
(set_attr "memory" "load")
--- gcc/testsuite/gcc.target/i386/avx512fp16-pr124335.c.jj 2026-03-02
20:15:26.543007388 +0100
+++ gcc/testsuite/gcc.target/i386/avx512fp16-pr124335.c 2026-03-02
20:17:58.529465343 +0100
@@ -0,0 +1,13 @@
+/* PR target/124335 */
+/* { dg-do assemble } */
+/* { dg-require-effective-target masm_intel } */
+/* { dg-options "-mavx512fp16 -masm=intel" } */
+/* { dg-require-effective-target avx512bw } */
+
+#include <x86intrin.h>
+
+__m128h
+foo (_Float16 const *x, __mmask8 y)
+{
+ return _mm_maskz_load_sh (y, x);
+}
Jakub
