On Thu, 26 Feb 2026, Robin Dapp wrote: > > The x86 backend transitioned to UNSPECs for masked loads/stores because > > of correctness issues, so IMO getting RTL semantics correct is important. > > > > Note that the flat (vec_predicate ...) feels a lot like an UNSPEC and > > we have to avoid making the actual semantics target dependent. > > I can't really think of a nice way of expressing predicated stores that would > fit the other variants we discussed.
There is no "nice" way to represent predicated store right now so I'd suggest to leave those out of the equation. I still think the closest we have for those is cond_exec. I'll note that micro-architectural wise masked stores are handled as read-modify-write with fault suppression. Modeling that isn't any easier than modeling actual partial writes though. > Too last-ditch ideas are either a (subreg (mem)) like abomination: > > (set (vec_predicate/cond_exec/... (mem ...)) > > where the entire predicate is on the LHS or a separate "thing" altogether: > > (vec_predicated_store > mem > val > mask > len > ...) > > -- Richard Biener <[email protected]> SUSE Software Solutions Germany GmbH, Frankenstrasse 146, 90461 Nuernberg, Germany; GF: Jochen Jaser, Andrew McDonald, Werner Knoblich; (HRB 36809, AG Nuernberg)
