I'm not sure what the rationale is for having "RejectNegative" on all
of the options that control instruction usage except for -mdouble-float,
but with this patch the documentation matches what is in the .opt files.
gcc/ChangeLog
PR other/122243
* config/or1k/elf.opt (mnewlib): Mark obsolete option as
"Undocumented".
* config/or1k/or1k.opt (mcmov): Don't use future tense in doc string.
(msfimm): Likewise.
(mshftimm): Likewise.
* doc/invoke.texi (Option Summary) <OpenRISC Options>: Don't
document -mnewlib.
(OpenRISC Options): Likewise. Add @opindex entry for
-mno-double-float. Fix more instances of incorrect use of future
tense.
---
gcc/config/or1k/elf.opt | 2 +-
gcc/config/or1k/or1k.opt | 6 +++---
gcc/doc/invoke.texi | 16 ++++++----------
3 files changed, 10 insertions(+), 14 deletions(-)
diff --git a/gcc/config/or1k/elf.opt b/gcc/config/or1k/elf.opt
index 28e960ed208..578aba3ba04 100644
--- a/gcc/config/or1k/elf.opt
+++ b/gcc/config/or1k/elf.opt
@@ -28,6 +28,6 @@ Target RejectNegative Joined
Configure the newlib board specific runtime. The default is or1ksim.
mnewlib
-Target RejectNegative
+Target RejectNegative Undocumented
This option is ignored; it is provided for compatibility purposes only. This
used to select linker and preprocessor options for use with newlib.
diff --git a/gcc/config/or1k/or1k.opt b/gcc/config/or1k/or1k.opt
index d252de08204..9ce8b800ed5 100644
--- a/gcc/config/or1k/or1k.opt
+++ b/gcc/config/or1k/or1k.opt
@@ -85,7 +85,7 @@ Enum(or1k_cmodel_type) String(large) Value(CMODEL_LARGE)
mcmov
Target RejectNegative Mask(CMOV)
Enable generation of conditional move (l.cmov) instructions. By default the
-equivalent will be generated using set and branch.
+equivalents are generated using set and branch.
mror
Target RejectNegative Mask(ROR)
@@ -106,11 +106,11 @@ loads are used to perform sign extension.
msfimm
Target RejectNegative Mask(SFIMM)
Enable generation of compare and set flag with immediate (l.sf*i) instructions.
-By default extra instructions will be generated to store the immediate to a
+By default extra instructions are generated to store the immediate to a
register first.
mshftimm
Target RejectNegative Mask(SHFTIMM)
Enable generation of shift with immediate (l.srai, l.srli, l.slli)
instructions.
-By default extra instructions will be generated to store the immediate to a
+By default extra instructions are generated to store the immediate to a
register first.
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 62afc5a66dd..f403d20bc0b 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -1285,7 +1285,7 @@ Objective-C and Objective-C++ Dialects}.
-mmainkernel -moptimize -msoft-stack -muniform-simt -mgomp}
@emph{OpenRISC Options} (@ref{OpenRISC Options})
-@gccoptlist{-mboard=@var{name} -mnewlib -mhard-mul -mhard-div
+@gccoptlist{-mboard=@var{name} -mhard-mul -mhard-div
-msoft-mul -msoft-div
-msoft-float -mhard-float -mdouble-float -munordered-float
-mcmov -mror -mrori -msext -msfimm -mshftimm
@@ -31580,14 +31580,9 @@ These options are defined for OpenRISC:
@opindex mboard
@item -mboard=@var{name}
-Configure a board specific runtime. This will be passed to the linker for
+Configure a board specific runtime. This is passed to the linker for
newlib board library linking. The default is @code{or1ksim}.
-@opindex mnewlib
-@item -mnewlib
-This option is ignored; it is for compatibility purposes only. This used to
-select linker and preprocessor options for use with newlib.
-
@opindex msoft-div
@opindex mhard-div
@item -msoft-div
@@ -31610,6 +31605,7 @@ Select software or hardware for floating point
operations.
The default is software.
@opindex mdouble-float
+@opindex mno-double-float
@item -mdouble-float
When @option{-mhard-float} is selected, enables generation of double-precision
floating point instructions. By default functions from @file{libgcc} are used
@@ -31625,7 +31621,7 @@ compare and set flag operations.
@opindex mcmov
@item -mcmov
Enable generation of conditional move (@code{l.cmov}) instructions. By
-default the equivalent will be generated using set and branch.
+default the equivalents are generated using set and branch.
@opindex mror
@item -mror
@@ -31646,13 +31642,13 @@ memory loads are used to perform sign extension.
@opindex msfimm
@item -msfimm
Enable generation of compare and set flag with immediate (@code{l.sf*i})
-instructions. By default extra instructions will be generated to store the
+instructions. By default extra instructions are generated to store the
immediate to a register first.
@opindex mshftimm
@item -mshftimm
Enable generation of shift with immediate (@code{l.srai}, @code{l.srli},
-@code{l.slli}) instructions. By default extra instructions will be generated
+@code{l.slli}) instructions. By default extra instructions are generated
to store the immediate to a register first.
@opindex mcmodel=
--
2.39.5
