Hi! r15-8956 changed in the test: -/* { dg-final { scan-assembler-times "ldclr\t" 16} */ +/* { dg-final { scan-assembler-times "ldclr\t" 16 } */ which made it even worse than before, when the directive has been silently ignored because it didn't match the regex for directives. Now it matches it but is unbalanced. So now I'm getting ERROR: tcl error sourcing /builddir/build/BUILD/gcc-15.0.1-build/gcc-15.0.1-20250329/gcc/testsuite/gcc.target/aarch64/aarch64.exp. ERROR: tcl error code NONE ERROR: unmatched open brace in list while executing "foreach op $tmp { verbose "Processing option: $op" 3 set status [catch $op errmsg] if { $status != 0 } { if { 0 && [info exists errorInfo] } {..." (procedure "saved-dg-test" line 76) invoked from within "saved-dg-test /builddir/build/BUILD/gcc-15.0.1-build/gcc-15.0.1-20250329/gcc/testsuite/gcc.target/aarch64/atomic-inst-ldlogic.c {} { -ansi -pedantic-e..." ("eval" body line 1) invoked from within etc.
The following patch fixes it and adds space after all the other scan-assembler-times counts in the file. Tested on x86_64-linux -> aarch64-linux cross, committed to trunk as obvious. 2025-03-30 Jakub Jelinek <ja...@redhat.com> * gcc.target/aarch64/atomic-inst-ldlogic.c: Fix another unbalanced {} directive problem. Add space after all scan-assembler-times counts. --- gcc/testsuite/gcc.target/aarch64/atomic-inst-ldlogic.c.jj 2025-03-27 19:13:58.355296491 +0100 +++ gcc/testsuite/gcc.target/aarch64/atomic-inst-ldlogic.c 2025-03-30 20:01:13.426150176 +0200 @@ -101,54 +101,54 @@ TEST (xor_load_notreturn, XOR_LOAD_NORET /* Load-OR. */ -/* { dg-final { scan-assembler-times "ldsetb\t" 8} } */ -/* { dg-final { scan-assembler-times "ldsetab\t" 16} } */ -/* { dg-final { scan-assembler-times "ldsetlb\t" 8} } */ -/* { dg-final { scan-assembler-times "ldsetalb\t" 16} } */ - -/* { dg-final { scan-assembler-times "ldseth\t" 8} } */ -/* { dg-final { scan-assembler-times "ldsetah\t" 16} } */ -/* { dg-final { scan-assembler-times "ldsetlh\t" 8} } */ -/* { dg-final { scan-assembler-times "ldsetalh\t" 16} } */ - -/* { dg-final { scan-assembler-times "ldset\t" 16} } */ -/* { dg-final { scan-assembler-times "ldseta\t" 32} } */ -/* { dg-final { scan-assembler-times "ldsetl\t" 16} } */ -/* { dg-final { scan-assembler-times "ldsetal\t" 32} } */ +/* { dg-final { scan-assembler-times "ldsetb\t" 8 } } */ +/* { dg-final { scan-assembler-times "ldsetab\t" 16 } } */ +/* { dg-final { scan-assembler-times "ldsetlb\t" 8 } } */ +/* { dg-final { scan-assembler-times "ldsetalb\t" 16 } } */ + +/* { dg-final { scan-assembler-times "ldseth\t" 8 } } */ +/* { dg-final { scan-assembler-times "ldsetah\t" 16 } } */ +/* { dg-final { scan-assembler-times "ldsetlh\t" 8 } } */ +/* { dg-final { scan-assembler-times "ldsetalh\t" 16 } } */ + +/* { dg-final { scan-assembler-times "ldset\t" 16 } } */ +/* { dg-final { scan-assembler-times "ldseta\t" 32 } } */ +/* { dg-final { scan-assembler-times "ldsetl\t" 16 } } */ +/* { dg-final { scan-assembler-times "ldsetal\t" 32 } } */ /* Load-AND. */ -/* { dg-final { scan-assembler-times "ldclrb\t" 8} } */ -/* { dg-final { scan-assembler-times "ldclrab\t" 16} } */ -/* { dg-final { scan-assembler-times "ldclrlb\t" 8} } */ -/* { dg-final { scan-assembler-times "ldclralb\t" 16} } */ - -/* { dg-final { scan-assembler-times "ldclrh\t" 8} } */ -/* { dg-final { scan-assembler-times "ldclrah\t" 16} } */ -/* { dg-final { scan-assembler-times "ldclrlh\t" 8} } */ -/* { dg-final { scan-assembler-times "ldclralh\t" 16} } */ - -/* { dg-final { scan-assembler-times "ldclr\t" 16 } */ -/* { dg-final { scan-assembler-times "ldclra\t" 32} } */ -/* { dg-final { scan-assembler-times "ldclrl\t" 16} } */ -/* { dg-final { scan-assembler-times "ldclral\t" 32} } */ +/* { dg-final { scan-assembler-times "ldclrb\t" 8 } } */ +/* { dg-final { scan-assembler-times "ldclrab\t" 16 } } */ +/* { dg-final { scan-assembler-times "ldclrlb\t" 8 } } */ +/* { dg-final { scan-assembler-times "ldclralb\t" 16 } } */ + +/* { dg-final { scan-assembler-times "ldclrh\t" 8 } } */ +/* { dg-final { scan-assembler-times "ldclrah\t" 16 } } */ +/* { dg-final { scan-assembler-times "ldclrlh\t" 8 } } */ +/* { dg-final { scan-assembler-times "ldclralh\t" 16 } } */ + +/* { dg-final { scan-assembler-times "ldclr\t" 16 } } */ +/* { dg-final { scan-assembler-times "ldclra\t" 32 } } */ +/* { dg-final { scan-assembler-times "ldclrl\t" 16 } } */ +/* { dg-final { scan-assembler-times "ldclral\t" 32 } } */ /* Load-XOR. */ -/* { dg-final { scan-assembler-times "ldeorb\t" 8} } */ -/* { dg-final { scan-assembler-times "ldeorab\t" 16} } */ +/* { dg-final { scan-assembler-times "ldeorb\t" 8 } } */ +/* { dg-final { scan-assembler-times "ldeorab\t" 16 } } */ /* { dg-final { scan-assembler-times "ldeorlb\t" 8 } } */ -/* { dg-final { scan-assembler-times "ldeoralb\t" 16} } */ +/* { dg-final { scan-assembler-times "ldeoralb\t" 16 } } */ -/* { dg-final { scan-assembler-times "ldeorh\t" 8} } */ -/* { dg-final { scan-assembler-times "ldeorah\t" 16} } */ -/* { dg-final { scan-assembler-times "ldeorlh\t" 8} } */ -/* { dg-final { scan-assembler-times "ldeoralh\t" 16} } */ - -/* { dg-final { scan-assembler-times "ldeor\t" 16} } */ -/* { dg-final { scan-assembler-times "ldeora\t" 32} } */ -/* { dg-final { scan-assembler-times "ldeorl\t" 16} } */ -/* { dg-final { scan-assembler-times "ldeoral\t" 32} } */ +/* { dg-final { scan-assembler-times "ldeorh\t" 8 } } */ +/* { dg-final { scan-assembler-times "ldeorah\t" 16 } } */ +/* { dg-final { scan-assembler-times "ldeorlh\t" 8 } } */ +/* { dg-final { scan-assembler-times "ldeoralh\t" 16 } } */ + +/* { dg-final { scan-assembler-times "ldeor\t" 16 } } */ +/* { dg-final { scan-assembler-times "ldeora\t" 32 } } */ +/* { dg-final { scan-assembler-times "ldeorl\t" 16 } } */ +/* { dg-final { scan-assembler-times "ldeoral\t" 32 } } */ /* { dg-final { scan-assembler-not "ldaxr\t" } } */ /* { dg-final { scan-assembler-not "stlxr\t" } } */ Jakub