> From: Gerald Pfeifer <ger...@pfeifer.com> > Sent: Sunday, March 30, 2025 5:23 AM > > On Mon, 24 Mar 2025, Haochen Jiang wrote: > > Mention AVX10.1 option changes, revise AVX10.2 option and mention > > APX_F new feature in GCC 15. > > --- > > > <li>New ISA extension support for Intel AVX10.1 was added. > > - AVX10.1 intrinsics are available via the <code>-mavx10.1</code> or > > - <code>-mavx10.1-256</code> compiler switch with 256-bit vector size > > - support. 512-bit vector size support for AVX10.1 intrinsics are > > - available via the <code>-mavx10.1-512</code> compiler switch. > > + AVX10.1 intrinsics are available via the <code>-mavx10.1-256</code> > > + compiler switch with 256-bit vector size support. 512-bit vector size > > + support for AVX10.1 intrinsics are available via the > > + <code>-mavx10.1-512</code> compiler switch. <code>- > mavx10.1</code> > > + enables AVX10.1 intrinsics with 256-bit vector size support in > > + GCC 14.1 > > I suggest to just use "256-bit vector support", dropping the word "size", and > similar for the 512-bit case. > > > + and GCC 14.2. Since GCC 14.3, it enables AVX10.1 intrinsics with > > 512-bit > > + vector size support. Since GCC 14.3, using <code>-mavx10.1</code> > > will > > + emit a warning due to this behavior change. > > How about streamlining this to > > "Since GCC 14.3, it enables AVX10.1 intrinsics with 512-bit vector > support (and emits a warning due to this behavior change)." > > ? > > > + compiler switch. MOVRS vector intrinsics are available via > > + the <code>-mmovrs -mavx10.2</code> compiler switch. > > Technically this is not one switch, so "switches"? > > > + AMX-FP8, AMX-MOVRS, AMX-TF32, AMX-TRANSPOSE, APX_F, AVX10.2, > AVX-IFMA, > > + AVX-NE-CONVERT, AVX-VNNI-INT16, AVX-VNNI-INT8, CMPccXADD, > MOVRS, SHA512, > > + SM3, SM4 and USER_MSR ISA extensions. > > We usually go for an Oxford comma, so "...SM4, and USER_MSR...". > > > + <li><code>-mavx10.1-256</code>, <code>-mavx10.1-512</code> and > > + <code>-mevex512</code> are marked as deprecated. Meanwhile, > > How about just "... are deprecated"? > > > > + <code>-mavx10.1</code> enables AVX10.1 intrinsics with 512-bit > > + vector size support, while in GCC 14.1 and GCC 14.2, it only enables > > + 256-bit vector size support. GCC will emit a warning when using these > > + compiler switches. <code>-mavx10.1-256</code>, <code>-mavx10.1- > 512</code> > > + and <code>-mevex512</code> will be removed in GCC 16, while the > warning > > + for the behavior change on <code>-mavx10.1</code> will also be > removed. > > How about "..in GCC 16 together with he warning..." or "in GCC 16, as will the > warning..."? > > > This is fine with these (or similar) changes.
Thanks for the review! I will do those changes after my vacation ends (approximately Apr. 8th) Thx, Haochen
