This reverts commit 95980b292b24110d3f1dffb81926df23c61b4fe7.
---
gcc/config/i386/avx10_2roundingintrin.h | 247 ------------------
gcc/config/i386/i386-builtin-types.def | 5 -
gcc/config/i386/i386-builtin.def | 10 -
gcc/config/i386/i386-expand.cc | 5 -
gcc/config/i386/sse.md | 4 +-
gcc/testsuite/gcc.target/i386/avx-1.c | 10 -
.../gcc.target/i386/avx10_2-rounding-3.c | 49 ----
gcc/testsuite/gcc.target/i386/sse-13.c | 10 -
gcc/testsuite/gcc.target/i386/sse-14.c | 13 -
gcc/testsuite/gcc.target/i386/sse-22.c | 13 -
gcc/testsuite/gcc.target/i386/sse-23.c | 10 -
11 files changed, 2 insertions(+), 374 deletions(-)
diff --git a/gcc/config/i386/avx10_2roundingintrin.h
b/gcc/config/i386/avx10_2roundingintrin.h
index f65533b1681..f0ac3f15ce1 100644
--- a/gcc/config/i386/avx10_2roundingintrin.h
+++ b/gcc/config/i386/avx10_2roundingintrin.h
@@ -1934,164 +1934,6 @@ _mm256_maskz_div_round_ps (__mmask8 __U, __m256 __A,
__m256 __B,
(__mmask8) __U,
__R);
}
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_fcmadd_round_pch (__m256h __A, __m256h __B, __m256h __D, const int __R)
-{
- return (__m256h) __builtin_ia32_vfcmaddcph256_round ((__v16hf) __A,
- (__v16hf) __B,
- (__v16hf) __D,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_fcmadd_round_pch (__m256h __A, __mmask8 __U, __m256h __B,
- __m256h __D, const int __R)
-{
- return (__m256h) __builtin_ia32_vfcmaddcph256_mask_round ((__v16hf) __A,
- (__v16hf) __B,
- (__v16hf) __D,
- __U,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask3_fcmadd_round_pch (__m256h __A, __m256h __B, __m256h __D,
- __mmask8 __U, const int __R)
-{
- return (__m256h) __builtin_ia32_vfcmaddcph256_mask3_round ((__v16hf) __A,
- (__v16hf) __B,
- (__v16hf) __D,
- __U,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_fcmadd_round_pch (__mmask8 __U, __m256h __A, __m256h __B,
- __m256h __D, const int __R)
-{
- return (__m256h) __builtin_ia32_vfcmaddcph256_maskz_round ((__v16hf) __A,
- (__v16hf) __B,
- (__v16hf) __D,
- __U,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_fcmul_round_pch (__m256h __A, __m256h __B, const int __R)
-{
- return
- (__m256h) __builtin_ia32_vfcmulcph256_round ((__v16hf) __A,
- (__v16hf) __B,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_fcmul_round_pch (__m256h __W, __mmask8 __U, __m256h __A,
- __m256h __B, const int __R)
-{
- return (__m256h) __builtin_ia32_vfcmulcph256_mask_round ((__v16hf) __A,
- (__v16hf) __B,
- (__v16hf) __W,
- (__mmask16) __U,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_fcmul_round_pch (__mmask8 __U, __m256h __A, __m256h __B,
- const int __R)
-{
- return (__m256h) __builtin_ia32_vfcmulcph256_mask_round ((__v16hf) __A,
- (__v16hf) __B,
- (__v16hf)
- _mm256_setzero_ph (),
- (__mmask16) __U,
- __R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_fixupimm_round_pd (__m256d __A, __m256d __B, __m256i __D,
- const int __C, const int __R)
-{
- return (__m256d) __builtin_ia32_fixupimmpd256_mask_round ((__v4df) __A,
- (__v4df) __B,
- (__v4di) __D,
- __C,
- (__mmask8) -1,
- __R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_fixupimm_round_pd (__m256d __A, __mmask8 __U, __m256d __B,
- __m256i __D, const int __C, const int __R)
-{
- return (__m256d) __builtin_ia32_fixupimmpd256_mask_round ((__v4df) __A,
- (__v4df) __B,
- (__v4di) __D,
- __C,
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_fixupimm_round_pd (__mmask8 __U, __m256d __A, __m256d __B,
- __m256i __D, const int __C, const int __R)
-{
- return (__m256d) __builtin_ia32_fixupimmpd256_maskz_round ((__v4df) __A,
- (__v4df) __B,
- (__v4di) __D,
- __C,
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_fixupimm_round_ps (__m256 __A, __m256 __B, __m256i __D, const int __C,
- const int __R)
-{
- return (__m256) __builtin_ia32_fixupimmps256_mask_round ((__v8sf) __A,
- (__v8sf) __B,
- (__v8si) __D,
- __C,
- (__mmask8) -1,
- __R);
-}
-
-extern __inline __m256
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_fixupimm_round_ps (__m256 __A, __mmask8 __U, __m256 __B,
- __m256i __D, const int __C, const int __R)
-{
- return (__m256) __builtin_ia32_fixupimmps256_mask_round ((__v8sf) __A,
- (__v8sf) __B,
- (__v8si) __D,
- __C,
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_fixupimm_round_ps (__mmask8 __U, __m256 __A, __m256 __B,
- __m256i __D, const int __C, const int __R)
-{
- return (__m256) __builtin_ia32_fixupimmps256_maskz_round ((__v8sf) __A,
- (__v8sf) __B,
- (__v8si) __D,
- __C,
- (__mmask8) __U,
- __R);
-}
#else
#define _mm256_add_round_pd(A, B, R) \
((__m256d) __builtin_ia32_addpd256_mask_round ((__v4df) (A), \
@@ -3246,97 +3088,8 @@ _mm256_maskz_fixupimm_round_ps (__mmask8 __U, __m256
__A, __m256 __B,
(_mm256_setzero_ps ()), \
(__mmask8) (U), \
(R)))
-
-#define _mm256_fcmadd_round_pch(A, B, D, R) \
- (__m256h) __builtin_ia32_vfcmaddcph256_round ((A), (B), (D), (R))
-
-#define _mm256_mask_fcmadd_round_pch(A, U, B, D, R) \
- ((__m256h) __builtin_ia32_vfcmaddcph256_mask_round ((__v16hf)(A), \
- (__v16hf)(B), \
- (__v16hf)(D), \
- (U), (R)))
-
-#define _mm256_mask3_fcmadd_round_pch(A, B, D, U, R) \
- ((__m256h) __builtin_ia32_vfcmaddcph256_mask3_round ((A), (B), (D), (U),
(R)))
-
-#define _mm256_maskz_fcmadd_round_pch(U, A, B, D, R) \
- ((__m256h) __builtin_ia32_vfcmaddcph256_maskz_round ((A), (B), (D), (U),
(R)))
-
-#define _mm256_fcmul_round_pch(A, B, R) \
- ((__m256h) __builtin_ia32_vfcmulcph256_round ((__v16hf) (A), \
- (__v16hf) (B), \
- (R)))
-
-#define _mm256_mask_fcmul_round_pch(W, U, A, B, R) \
- ((__m256h) __builtin_ia32_vfcmulcph256_mask_round ((__v16hf) (A), \
- (__v16hf) (B), \
- (__v16hf) (W), \
- (__mmask16) (U), \
- (R)))
-
-#define _mm256_maskz_fcmul_round_pch(U, A, B, R) \
- ((__m256h) __builtin_ia32_vfcmulcph256_mask_round ((__v16hf) (A), \
- (__v16hf) (B), \
- (__v16hf) \
- (_mm256_setzero_ph ()), \
- (__mmask16) (U), \
- (R)))
-
-#define _mm256_fixupimm_round_pd(A, B, D, C, R) \
- ((__m256d) __builtin_ia32_fixupimmpd256_mask_round ((__v4df) (A), \
- (__v4df) (B), \
- (__v4di) (D), \
- (C), \
- (__mmask8) (-1), \
- (R)))
-
-#define _mm256_mask_fixupimm_round_pd(A, U, B, D, C, R)\
- ((__m256d) __builtin_ia32_fixupimmpd256_mask_round ((__v4df) (A), \
- (__v4df) (B), \
- (__v4di) (D), \
- (C), \
- (__mmask8) (U), \
- (R)))
-
-#define _mm256_maskz_fixupimm_round_pd(U, A, B, D, C, R)\
- ((__m256d) __builtin_ia32_fixupimmpd256_maskz_round ((__v4df) (A), \
- (__v4df) (B), \
- (__v4di) (D), \
- (C), \
- (__mmask8) (U), \
- (R)))
-
-#define _mm256_fixupimm_round_ps(A, B, D, C, R)\
- ((__m256) __builtin_ia32_fixupimmps256_mask_round ((__v8sf) (A), \
- (__v8sf) (B), \
- (__v8si) (D), \
- (C), \
- (__mmask8) (-1), \
- (R)))
-
-#define _mm256_mask_fixupimm_round_ps(A, U, B, D, C, R)\
- ((__m256) __builtin_ia32_fixupimmps256_mask_round ((__v8sf) (A), \
- (__v8sf) (B), \
- (__v8si) (D), \
- (C), \
- (__mmask8) (U), \
- (R)))
-
-#define _mm256_maskz_fixupimm_round_ps(U, A, B, D, C, R)\
- ((__m256) __builtin_ia32_fixupimmps256_maskz_round ((__v8sf) (A), \
- (__v8sf) (B), \
- (__v8si) (D), \
- (C), \
- (__mmask8) (U), \
- (R)))
#endif
-#define _mm256_cmul_round_pch(A, B, R) _mm256_fcmul_round_pch ((A), (B), (R))
-#define _mm256_mask_cmul_round_pch(W, U, A, B, R) \
- _mm256_mask_fcmul_round_pch ((W), (U), (A), (B), (R))
-#define _mm256_maskz_cmul_round_pch(U, A, B, R) \
- _mm256_maskz_fcmul_round_pch ((U), (A), (B), (R))
-
#ifdef __DISABLE_AVX10_2_256__
#undef __DISABLE_AVX10_2_256__
#pragma GCC pop_options
diff --git a/gcc/config/i386/i386-builtin-types.def
b/gcc/config/i386/i386-builtin-types.def
index 9a9f2a9a365..2e18118da43 100644
--- a/gcc/config/i386/i386-builtin-types.def
+++ b/gcc/config/i386/i386-builtin-types.def
@@ -1441,11 +1441,6 @@ DEF_FUNCTION_TYPE (V4DF, V4DI, V4DF, UQI, INT)
DEF_FUNCTION_TYPE (V8HF, V4DI, V8HF, UQI, INT)
DEF_FUNCTION_TYPE (V4SF, V4DI, V4SF, UQI, INT)
DEF_FUNCTION_TYPE (V16HF, V16HI, V16HF, UHI, INT)
-DEF_FUNCTION_TYPE (V16HF, V16HF, V16HF, V16HF, INT)
-DEF_FUNCTION_TYPE (V16HF, V16HF, V16HF, V16HF, UQI, INT)
-DEF_FUNCTION_TYPE (V4DF, V4DF, V4DF, V4DI, INT, UQI, INT)
-DEF_FUNCTION_TYPE (V8SF, V8SF, V8SF, V8SI, INT, UQI, INT)
-DEF_FUNCTION_TYPE (V16HF, V16HF, V16HF, INT)
DEF_FUNCTION_TYPE (V32HF, V16SF, V16SF, V32HF, USI, INT)
DEF_FUNCTION_TYPE (V32HF, V16SF, V16SF, V32HF, USI)
DEF_FUNCTION_TYPE (V16HF, V8SF, V8SF, V16HF, UHI)
diff --git a/gcc/config/i386/i386-builtin.def b/gcc/config/i386/i386-builtin.def
index 01c4ce6cb1d..91d8896733d 100644
--- a/gcc/config/i386/i386-builtin.def
+++ b/gcc/config/i386/i386-builtin.def
@@ -3716,16 +3716,6 @@ BDESC (0, OPTION_MASK_ISA2_AVX10_2_256,
CODE_FOR_avx512fp16_vcvtw2ph_v16hi_mask_
BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx_divv4df3_mask_round,
"__builtin_ia32_divpd256_mask_round", IX86_BUILTIN_VDIVPD256_MASK_ROUND,
UNKNOWN, (int) V4DF_FTYPE_V4DF_V4DF_V4DF_UQI_INT)
BDESC (0, OPTION_MASK_ISA2_AVX10_2_256,
CODE_FOR_avx512fp16_divv16hf3_mask_round, "__builtin_ia32_divph256_mask_round",
IX86_BUILTIN_VDIVPH256_MASK_ROUND, UNKNOWN, (int)
V16HF_FTYPE_V16HF_V16HF_V16HF_UHI_INT)
BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx_divv8sf3_mask_round,
"__builtin_ia32_divps256_mask_round", IX86_BUILTIN_VDIVPS256_MASK_ROUND,
UNKNOWN, (int) V8SF_FTYPE_V8SF_V8SF_V8SF_UQI_INT)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_fma_fcmaddc_v16hf_round,
"__builtin_ia32_vfcmaddcph256_round", IX86_BUILTIN_VFCMADDCPH256_ROUND,
UNKNOWN, (int) V16HF_FTYPE_V16HF_V16HF_V16HF_INT)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256,
CODE_FOR_avx512vl_fcmaddc_v16hf_mask1_round,
"__builtin_ia32_vfcmaddcph256_mask_round",
IX86_BUILTIN_VFCMADDCPH256_MASK_ROUND, UNKNOWN, (int)
V16HF_FTYPE_V16HF_V16HF_V16HF_UQI_INT)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256,
CODE_FOR_avx512vl_fcmaddc_v16hf_mask_round,
"__builtin_ia32_vfcmaddcph256_mask3_round",
IX86_BUILTIN_VFCMADDCPH256_MASK3_ROUND, UNKNOWN, (int)
V16HF_FTYPE_V16HF_V16HF_V16HF_UQI_INT)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256,
CODE_FOR_avx512vl_fcmaddc_v16hf_maskz_round,
"__builtin_ia32_vfcmaddcph256_maskz_round",
IX86_BUILTIN_VFCMADDCPH256_MASKZ_ROUND, UNKNOWN, (int)
V16HF_FTYPE_V16HF_V16HF_V16HF_UQI_INT)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx512vl_fcmulc_v16hf_round,
"__builtin_ia32_vfcmulcph256_round", IX86_BUILTIN_VFCMULCPH256_ROUND, UNKNOWN,
(int) V16HF_FTYPE_V16HF_V16HF_INT)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256,
CODE_FOR_avx512vl_fcmulc_v16hf_mask_round,
"__builtin_ia32_vfcmulcph256_mask_round", IX86_BUILTIN_VFCMULCPH256_MASK_ROUND,
UNKNOWN, (int) V16HF_FTYPE_V16HF_V16HF_V16HF_UHI_INT)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256,
CODE_FOR_avx512vl_fixupimmv4df_mask_round,
"__builtin_ia32_fixupimmpd256_mask_round",
IX86_BUILTIN_VFIXUPIMMPD256_MASK_ROUND, UNKNOWN, (int)
V4DF_FTYPE_V4DF_V4DF_V4DI_INT_UQI_INT)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256,
CODE_FOR_avx512vl_fixupimmv4df_maskz_round,
"__builtin_ia32_fixupimmpd256_maskz_round",
IX86_BUILTIN_VFIXUPIMMPD256_MASKZ_ROUND, UNKNOWN, (int)
V4DF_FTYPE_V4DF_V4DF_V4DI_INT_UQI_INT)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256,
CODE_FOR_avx512vl_fixupimmv8sf_mask_round,
"__builtin_ia32_fixupimmps256_mask_round",
IX86_BUILTIN_VFIXUPIMMPS256_MASK_ROUND, UNKNOWN, (int)
V8SF_FTYPE_V8SF_V8SF_V8SI_INT_UQI_INT)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256,
CODE_FOR_avx512vl_fixupimmv8sf_maskz_round,
"__builtin_ia32_fixupimmps256_maskz_round",
IX86_BUILTIN_VFIXUPIMMPS256_MASKZ_ROUND, UNKNOWN, (int)
V8SF_FTYPE_V8SF_V8SF_V8SI_INT_UQI_INT)
BDESC (0, OPTION_MASK_ISA2_AVX10_2_512,
CODE_FOR_avx10_2_cvt2ps2phx_v32hf_mask_round,
"__builtin_ia32_vcvt2ps2phx512_mask_round",
IX86_BUILTIN_VCVT2PS2PHX_V32HF_MASK_ROUND, UNKNOWN, (int)
V32HF_FTYPE_V16SF_V16SF_V32HF_USI_INT)
BDESC (0, OPTION_MASK_ISA2_AVX10_2_512,
CODE_FOR_avx10_2_cvtph2ibsv32hf_mask_round,
"__builtin_ia32_cvtph2ibs512_mask_round", IX86_BUILTIN_CVTPH2IBS512_MASK_ROUND,
UNKNOWN, (int) V32HI_FTYPE_V32HF_V32HI_USI_INT)
BDESC (0, OPTION_MASK_ISA2_AVX10_2_512,
CODE_FOR_avx10_2_cvtph2iubsv32hf_mask_round,
"__builtin_ia32_cvtph2iubs512_mask_round",
IX86_BUILTIN_CVTPH2IUBS512_MASK_ROUND, UNKNOWN, (int)
V32HI_FTYPE_V32HF_V32HI_USI_INT)
diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc
index 95d668382eb..8df86af6a01 100644
--- a/gcc/config/i386/i386-expand.cc
+++ b/gcc/config/i386/i386-expand.cc
@@ -12709,7 +12709,6 @@ ix86_expand_round_builtin (const struct
builtin_description *d,
nargs = 2;
break;
case V32HF_FTYPE_V32HF_V32HF_INT:
- case V16HF_FTYPE_V16HF_V16HF_INT:
case V8HF_FTYPE_V8HF_V8HF_INT:
case V8HF_FTYPE_V8HF_INT_INT:
case V8HF_FTYPE_V8HF_UINT_INT:
@@ -12747,7 +12746,6 @@ ix86_expand_round_builtin (const struct
builtin_description *d,
case V16SI_FTYPE_V16SF_V16SI_HI_INT:
case V16SI_FTYPE_V16SF_V16SI_UHI_INT:
case V16SI_FTYPE_V16HF_V16SI_UHI_INT:
- case V16HF_FTYPE_V16HF_V16HF_V16HF_INT:
case V16HF_FTYPE_V16SI_V16HF_UHI_INT:
case V16HI_FTYPE_V16HF_V16HI_UHI_INT:
case V8DF_FTYPE_V8SF_V8DF_QI_INT:
@@ -12795,7 +12793,6 @@ ix86_expand_round_builtin (const struct
builtin_description *d,
case V8SF_FTYPE_V8SF_V8SF_V8SF_UQI_INT:
case V16SF_FTYPE_V16SF_V16SF_V16SF_HI_INT:
case V16HF_FTYPE_V16HF_V16HF_V16HF_UHI_INT:
- case V16HF_FTYPE_V16HF_V16HF_V16HF_UQI_INT:
case V32HF_FTYPE_V32HF_V32HF_V32HF_UHI_INT:
case V32HF_FTYPE_V32HF_V32HF_V32HF_USI_INT:
case V2DF_FTYPE_V8HF_V2DF_V2DF_UQI_INT:
@@ -12845,9 +12842,7 @@ ix86_expand_round_builtin (const struct
builtin_description *d,
nargs_constant = 4;
break;
case V8DF_FTYPE_V8DF_V8DF_V8DI_INT_QI_INT:
- case V4DF_FTYPE_V4DF_V4DF_V4DI_INT_UQI_INT:
case V16SF_FTYPE_V16SF_V16SF_V16SI_INT_HI_INT:
- case V8SF_FTYPE_V8SF_V8SF_V8SI_INT_UQI_INT:
case V2DF_FTYPE_V2DF_V2DF_V2DI_INT_QI_INT:
case V4SF_FTYPE_V4SF_V4SF_V4SI_INT_QI_INT:
nargs = 6;
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 2f0d2bb0033..fb89322f7e5 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -14156,7 +14156,7 @@
(match_operand:<sseintvecmode> 3 "nonimmediate_operand"
"<round_saeonly_constraint>")
(match_operand:SI 4 "const_0_to_255_operand")]
UNSPEC_FIXUPIMM))]
- "TARGET_AVX512F && <round_saeonly_mode_condition>"
+ "TARGET_AVX512F"
"vfixupimm<ssemodesuffix>\t{%4, <round_saeonly_sd_mask_op5>%3, %2,
%0<sd_mask_op5>|%0<sd_mask_op5>, %2, %3<round_saeonly_sd_mask_op5>, %4}";
[(set_attr "prefix" "evex")
(set_attr "mode" "<MODE>")])
@@ -14172,7 +14172,7 @@
UNSPEC_FIXUPIMM)
(match_dup 1)
(match_operand:<avx512fmaskmode> 5 "register_operand" "Yk")))]
- "TARGET_AVX512F && <round_saeonly_mode_condition>"
+ "TARGET_AVX512F"
"vfixupimm<ssemodesuffix>\t{%4, <round_saeonly_op6>%3, %2,
%0%{%5%}|%0%{%5%}, %2, %3<round_saeonly_op6>, %4}";
[(set_attr "prefix" "evex")
(set_attr "mode" "<MODE>")])
diff --git a/gcc/testsuite/gcc.target/i386/avx-1.c
b/gcc/testsuite/gcc.target/i386/avx-1.c
index b1b2cfec193..a64c96c0832 100644
--- a/gcc/testsuite/gcc.target/i386/avx-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx-1.c
@@ -899,16 +899,6 @@
#define __builtin_ia32_divpd256_mask_round(A, B, C, D, E)
__builtin_ia32_divpd256_mask_round(A, B, C, D, 8)
#define __builtin_ia32_divph256_mask_round(A, B, C, D, E)
__builtin_ia32_divph256_mask_round(A, B, C, D, 8)
#define __builtin_ia32_divps256_mask_round(A, B, C, D, E)
__builtin_ia32_divps256_mask_round(A, B, C, D, 8)
-#define __builtin_ia32_vfcmaddcph256_round(A, B, C, D)
__builtin_ia32_vfcmaddcph256_round(A, B, C, 8)
-#define __builtin_ia32_vfcmaddcph256_mask_round(A, C, D, B, E)
__builtin_ia32_vfcmaddcph256_mask_round(A, C, D, B, 8)
-#define __builtin_ia32_vfcmaddcph256_mask3_round(A, C, D, B, E)
__builtin_ia32_vfcmaddcph256_mask3_round(A, C, D, B, 8)
-#define __builtin_ia32_vfcmaddcph256_maskz_round(B, C, D, A, E)
__builtin_ia32_vfcmaddcph256_maskz_round(B, C, D, A, 8)
-#define __builtin_ia32_vfcmulcph256_round(A, B, C)
__builtin_ia32_vfcmulcph256_round(A, B, 8)
-#define __builtin_ia32_vfcmulcph256_mask_round(A, B, C, D, E)
__builtin_ia32_vfcmulcph256_mask_round(A, B, C, D, 8)
-#define __builtin_ia32_fixupimmpd256_mask_round(A, B, C, I, E, F)
__builtin_ia32_fixupimmpd256_mask_round(A, B, C, 1, E, 8)
-#define __builtin_ia32_fixupimmpd256_maskz_round(A, B, C, I, E, F)
__builtin_ia32_fixupimmpd256_maskz_round(A, B, C, 1, E, 8)
-#define __builtin_ia32_fixupimmps256_mask_round(A, B, C, I, E, F)
__builtin_ia32_fixupimmps256_mask_round(A, B, C, 1, E, 8)
-#define __builtin_ia32_fixupimmps256_maskz_round(A, B, C, I, E, F)
__builtin_ia32_fixupimmps256_maskz_round(A, B, C, 1, E, 8)
/* avx10_2-512mediaintrin.h */
#define __builtin_ia32_mpsadbw512(A, B, C) __builtin_ia32_mpsadbw512 (A, B, 1)
diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-rounding-3.c
b/gcc/testsuite/gcc.target/i386/avx10_2-rounding-3.c
index d61054f3058..1e6b3628b74 100644
--- a/gcc/testsuite/gcc.target/i386/avx10_2-rounding-3.c
+++ b/gcc/testsuite/gcc.target/i386/avx10_2-rounding-3.c
@@ -15,18 +15,6 @@
/* { dg-final { scan-assembler-times "vdivps\[
\\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vdivps\[
\\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1
} } */
/* { dg-final { scan-assembler-times "vdivps\[
\\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[
\\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vfcmaddcph\[
\\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[
\\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vfcmaddcph\[
\\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[
\\t\]+#)" 2 } } */
-/* { dg-final { scan-assembler-times "vfcmaddcph\[
\\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vfcmulcph\[
\\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[
\\t\]+#)" 2 } } */
-/* { dg-final { scan-assembler-times "vfcmulcph\[
\\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[
\\t\]+#)" 2 } } */
-/* { dg-final { scan-assembler-times "vfcmulcph\[
\\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[
\\t\]+#)" 2 } } */
-/* { dg-final { scan-assembler-times "vfixupimmpd\[
\\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vfixupimmpd\[
\\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 }
} */
-/* { dg-final { scan-assembler-times "vfixupimmpd\[
\\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)"
1 } } */
-/* { dg-final { scan-assembler-times "vfixupimmps\[
\\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vfixupimmps\[
\\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 }
} */
-/* { dg-final { scan-assembler-times "vfixupimmps\[
\\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)"
1 } } */
#include <immintrin.h>
@@ -68,40 +56,3 @@ avx10_2_test_2 (void)
x = _mm256_mask_div_round_ps (x, m16, x, x, _MM_FROUND_TO_POS_INF |
_MM_FROUND_NO_EXC);
x = _mm256_maskz_div_round_ps (m16, x, x, _MM_FROUND_TO_ZERO |
_MM_FROUND_NO_EXC);
}
-
-void extern
-avx10_2_test_3 (void)
-{
- xh = _mm256_fcmadd_round_pch (xh, xh, xh, 8);
- xh = _mm256_mask_fcmadd_round_pch (xh, m8, xh, xh, 8);
- xh = _mm256_mask3_fcmadd_round_pch (xh, xh, xh, m8, 8);
- xh = _mm256_maskz_fcmadd_round_pch (m8, xh, xh, xh, 11);
-}
-
-void extern
-avx10_2_test_4 (void)
-{
- xh = _mm256_fcmul_round_pch (xh, xh, 8);
- xh = _mm256_mask_fcmul_round_pch (xh, m8, xh, xh, 8);
- xh = _mm256_maskz_fcmul_round_pch (m8, xh, xh, 11);
-}
-
-void extern
-avx10_2_test_5 (void)
-{
- xh = _mm256_cmul_round_pch (xh, xh, 8);
- xh = _mm256_mask_cmul_round_pch (xh, m8, xh, xh, 8);
- xh = _mm256_maskz_cmul_round_pch (m8, xh, xh, 11);
-}
-
-void extern
-avx10_2_test_6 (void)
-{
- xd = _mm256_fixupimm_round_pd (xd, xd, xi, 3, _MM_FROUND_NO_EXC);
- xd = _mm256_mask_fixupimm_round_pd (xd, m8, xd, xi, 3, _MM_FROUND_NO_EXC);
- xd = _mm256_maskz_fixupimm_round_pd (m8, xd, xd, xi, 3, _MM_FROUND_NO_EXC);
-
- x = _mm256_fixupimm_round_ps (x, x, xi, 3, _MM_FROUND_NO_EXC);
- x = _mm256_mask_fixupimm_round_ps (x, m8, x, xi, 3, _MM_FROUND_NO_EXC);
- x = _mm256_maskz_fixupimm_round_ps (m8, x, x, xi, 3, _MM_FROUND_NO_EXC);
-}
diff --git a/gcc/testsuite/gcc.target/i386/sse-13.c
b/gcc/testsuite/gcc.target/i386/sse-13.c
index 870fbe24525..9c15611da96 100644
--- a/gcc/testsuite/gcc.target/i386/sse-13.c
+++ b/gcc/testsuite/gcc.target/i386/sse-13.c
@@ -906,16 +906,6 @@
#define __builtin_ia32_divpd256_mask_round(A, B, C, D, E)
__builtin_ia32_divpd256_mask_round(A, B, C, D, 8)
#define __builtin_ia32_divph256_mask_round(A, B, C, D, E)
__builtin_ia32_divph256_mask_round(A, B, C, D, 8)
#define __builtin_ia32_divps256_mask_round(A, B, C, D, E)
__builtin_ia32_divps256_mask_round(A, B, C, D, 8)
-#define __builtin_ia32_vfcmaddcph256_round(A, B, C, D)
__builtin_ia32_vfcmaddcph256_round(A, B, C, 8)
-#define __builtin_ia32_vfcmaddcph256_mask_round(A, C, D, B, E)
__builtin_ia32_vfcmaddcph256_mask_round(A, C, D, B, 8)
-#define __builtin_ia32_vfcmaddcph256_mask3_round(A, C, D, B, E)
__builtin_ia32_vfcmaddcph256_mask3_round(A, C, D, B, 8)
-#define __builtin_ia32_vfcmaddcph256_maskz_round(B, C, D, A, E)
__builtin_ia32_vfcmaddcph256_maskz_round(B, C, D, A, 8)
-#define __builtin_ia32_vfcmulcph256_round(A, B, C)
__builtin_ia32_vfcmulcph256_round(A, B, 8)
-#define __builtin_ia32_vfcmulcph256_mask_round(A, B, C, D, E)
__builtin_ia32_vfcmulcph256_mask_round(A, B, C, D, 8)
-#define __builtin_ia32_fixupimmpd256_mask_round(A, B, C, D, E, F)
__builtin_ia32_fixupimmpd256_mask_round(A, B, C, 1, E, 8)
-#define __builtin_ia32_fixupimmpd256_maskz_round(A, B, C, D, E, F)
__builtin_ia32_fixupimmpd256_maskz_round(A, B, C, 1, E, 8)
-#define __builtin_ia32_fixupimmps256_mask_round(A, B, C, D, E, F)
__builtin_ia32_fixupimmps256_mask_round(A, B, C, 1, E, 8)
-#define __builtin_ia32_fixupimmps256_maskz_round(A, B, C, D, E, F)
__builtin_ia32_fixupimmps256_maskz_round(A, B, C, 1, E, 8)
/* avx10_2-512mediaintrin.h */
#define __builtin_ia32_mpsadbw512(A, B, C) __builtin_ia32_mpsadbw512 (A, B, 1)
diff --git a/gcc/testsuite/gcc.target/i386/sse-14.c
b/gcc/testsuite/gcc.target/i386/sse-14.c
index 25eaca6bf1d..bafe31dc4e8 100644
--- a/gcc/testsuite/gcc.target/i386/sse-14.c
+++ b/gcc/testsuite/gcc.target/i386/sse-14.c
@@ -1119,7 +1119,6 @@ test_2 (_mm256_maskz_cvt_roundepi16_ph, __m256h,
__mmask16, __m256i, 8)
test_2 (_mm256_div_round_pd, __m256d, __m256d, __m256d, 9)
test_2 (_mm256_div_round_ph, __m256h, __m256h, __m256h, 9)
test_2 (_mm256_div_round_ps, __m256, __m256, __m256, 9)
-test_2 (_mm256_fcmul_round_pch, __m256h, __m256h, __m256h, 8)
test_2x (_mm256_cmp_round_pd_mask, __mmask8, __m256d, __m256d, 1, 8)
test_2x (_mm256_cmp_round_ph_mask, __mmask16, __m256h, __m256h, 1, 8)
test_2x (_mm256_cmp_round_ps_mask, __mmask8, __m256, __m256, 1, 8)
@@ -1176,27 +1175,15 @@ test_3 (_mm256_mask_cvt_roundepi16_ph, __m256h,
__m256h, __mmask16, __m256i, 8)
test_3 (_mm256_maskz_div_round_pd, __m256d, __mmask8, __m256d, __m256d, 9)
test_3 (_mm256_maskz_div_round_ph, __m256h, __mmask8, __m256h, __m256h, 9)
test_3 (_mm256_maskz_div_round_ps, __m256, __mmask8, __m256, __m256, 9)
-test_3 (_mm256_fcmadd_round_pch, __m256h, __m256h, __m256h, __m256h, 8)
-test_3 (_mm256_maskz_fcmul_round_pch, __m256h, __mmask8, __m256h, __m256h, 8)
test_3x (_mm256_mask_cmp_round_pd_mask, __mmask8, __mmask8, __m256d, __m256d,
1, 8)
test_3x (_mm256_mask_cmp_round_ph_mask, __mmask16, __mmask16, __m256h,
__m256h, 1, 8)
test_3x (_mm256_mask_cmp_round_ps_mask, __mmask8, __mmask8, __m256, __m256, 1,
8)
-test_3x (_mm256_fixupimm_round_pd, __m256d, __m256d, __m256d, __m256i, 3, 8)
-test_3x (_mm256_fixupimm_round_ps, __m256, __m256, __m256, __m256i, 3, 8)
test_4 (_mm256_mask_add_round_pd, __m256d, __m256d, __mmask8, __m256d,
__m256d, 9)
test_4 (_mm256_mask_add_round_ph, __m256h, __m256h, __mmask16, __m256h,
__m256h, 8)
test_4 (_mm256_mask_add_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9)
test_4 (_mm256_mask_div_round_pd, __m256d, __m256d, __mmask8, __m256d,
__m256d, 9)
test_4 (_mm256_mask_div_round_ph, __m256h, __m256h, __mmask8, __m256h,
__m256h, 9)
test_4 (_mm256_mask_div_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9)
-test_4 (_mm256_mask_fcmadd_round_pch, __m256h, __m256h, __mmask8, __m256h,
__m256h, 9)
-test_4 (_mm256_mask3_fcmadd_round_pch, __m256h, __m256h, __m256h, __m256h,
__mmask8, 9)
-test_4 (_mm256_maskz_fcmadd_round_pch, __m256h, __mmask8, __m256h, __m256h,
__m256h, 9)
-test_4 (_mm256_mask_fcmul_round_pch, __m256h, __m256h, __mmask8, __m256h,
__m256h, 8)
-test_4x (_mm256_maskz_fixupimm_round_pd, __m256d, __mmask8, __m256d, __m256d,
__m256i, 3, 8)
-test_4x (_mm256_maskz_fixupimm_round_ps, __m256, __mmask8, __m256, __m256,
__m256i, 3, 8)
-test_4x (_mm256_mask_fixupimm_round_pd, __m256d, __m256d, __mmask8, __m256d,
__m256i, 3, 8)
-test_4x (_mm256_mask_fixupimm_round_ps, __m256, __m256, __mmask8, __m256,
__m256i, 3, 8)
/* avx10_2-512mediaintrin.h */
test_2 (_mm512_mpsadbw_epu8, __m512i, __m512i, __m512i, 1)
diff --git a/gcc/testsuite/gcc.target/i386/sse-22.c
b/gcc/testsuite/gcc.target/i386/sse-22.c
index d66f0a0900c..4cfbf30cfab 100644
--- a/gcc/testsuite/gcc.target/i386/sse-22.c
+++ b/gcc/testsuite/gcc.target/i386/sse-22.c
@@ -1162,7 +1162,6 @@ test_2 (_mm256_maskz_cvt_roundepi16_ph, __m256h,
__mmask16, __m256i, 8)
test_2 (_mm256_div_round_pd, __m256d, __m256d, __m256d, 9)
test_2 (_mm256_div_round_ph, __m256h, __m256h, __m256h, 9)
test_2 (_mm256_div_round_ps, __m256, __m256, __m256, 9)
-test_2 (_mm256_fcmul_round_pch, __m256h, __m256h, __m256h, 8)
test_2x (_mm256_cmp_round_pd_mask, __mmask8, __m256d, __m256d, 1, 8)
test_2x (_mm256_cmp_round_ph_mask, __mmask16, __m256h, __m256h, 1, 8)
test_2x (_mm256_cmp_round_ps_mask, __mmask8, __m256, __m256, 1, 8)
@@ -1219,27 +1218,15 @@ test_3 (_mm256_mask_cvt_roundepi16_ph, __m256h,
__m256h, __mmask16, __m256i, 8)
test_3 (_mm256_maskz_div_round_pd, __m256d, __mmask8, __m256d, __m256d, 9)
test_3 (_mm256_maskz_div_round_ph, __m256h, __mmask8, __m256h, __m256h, 9)
test_3 (_mm256_maskz_div_round_ps, __m256, __mmask8, __m256, __m256, 9)
-test_3 (_mm256_fcmadd_round_pch, __m256h, __m256h, __m256h, __m256h, 8)
-test_3 (_mm256_maskz_fcmul_round_pch, __m256h, __mmask8, __m256h, __m256h, 8)
test_3x (_mm256_mask_cmp_round_pd_mask, __mmask8, __mmask8, __m256d, __m256d,
1, 8)
test_3x (_mm256_mask_cmp_round_ph_mask, __mmask16, __mmask16, __m256h,
__m256h, 1, 8)
test_3x (_mm256_mask_cmp_round_ps_mask, __mmask8, __mmask8, __m256, __m256, 1,
8)
-test_3x (_mm256_fixupimm_round_pd, __m256d, __m256d, __m256d, __m256i, 3, 8)
-test_3x (_mm256_fixupimm_round_ps, __m256, __m256, __m256, __m256i, 3, 8)
test_4 (_mm256_mask_add_round_pd, __m256d, __m256d, __mmask8, __m256d,
__m256d, 9)
test_4 (_mm256_mask_add_round_ph, __m256h, __m256h, __mmask16, __m256h,
__m256h, 8)
test_4 (_mm256_mask_add_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9)
test_4 (_mm256_mask_div_round_pd, __m256d, __m256d, __mmask8, __m256d,
__m256d, 9)
test_4 (_mm256_mask_div_round_ph, __m256h, __m256h, __mmask8, __m256h,
__m256h, 9)
test_4 (_mm256_mask_div_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9)
-test_4 (_mm256_mask_fcmadd_round_pch, __m256h, __m256h, __mmask8, __m256h,
__m256h, 9)
-test_4 (_mm256_mask3_fcmadd_round_pch, __m256h, __m256h, __m256h, __m256h,
__mmask8, 9)
-test_4 (_mm256_maskz_fcmadd_round_pch, __m256h, __mmask8, __m256h, __m256h,
__m256h, 9)
-test_4 (_mm256_mask_fcmul_round_pch, __m256h, __m256h, __mmask8, __m256h,
__m256h, 8)
-test_4x (_mm256_maskz_fixupimm_round_pd, __m256d, __mmask8, __m256d, __m256d,
__m256i, 3, 8)
-test_4x (_mm256_maskz_fixupimm_round_ps, __m256, __mmask8, __m256, __m256,
__m256i, 3, 8)
-test_4x (_mm256_mask_fixupimm_round_pd, __m256d, __m256d, __mmask8, __m256d,
__m256i, 3, 8)
-test_4x (_mm256_mask_fixupimm_round_ps, __m256, __m256, __mmask8, __m256,
__m256i, 3, 8)
/* avx10_2-512mediaintrin.h */
test_2 (_mm512_mpsadbw_epu8, __m512i, __m512i, __m512i, 1)
diff --git a/gcc/testsuite/gcc.target/i386/sse-23.c
b/gcc/testsuite/gcc.target/i386/sse-23.c
index aa40d001b89..d249917b61b 100644
--- a/gcc/testsuite/gcc.target/i386/sse-23.c
+++ b/gcc/testsuite/gcc.target/i386/sse-23.c
@@ -881,16 +881,6 @@
#define __builtin_ia32_divpd256_mask_round(A, B, C, D, E)
__builtin_ia32_divpd256_mask_round(A, B, C, D, 8)
#define __builtin_ia32_divph256_mask_round(A, B, C, D, E)
__builtin_ia32_divph256_mask_round(A, B, C, D, 8)
#define __builtin_ia32_divps256_mask_round(A, B, C, D, E)
__builtin_ia32_divps256_mask_round(A, B, C, D, 8)
-#define __builtin_ia32_vfcmaddcph256_round(A, B, C, D)
__builtin_ia32_vfcmaddcph256_round(A, B, C, 8)
-#define __builtin_ia32_vfcmaddcph256_mask_round(A, C, D, B, E)
__builtin_ia32_vfcmaddcph256_mask_round(A, C, D, B, 8)
-#define __builtin_ia32_vfcmaddcph256_mask3_round(A, C, D, B, E)
__builtin_ia32_vfcmaddcph256_mask3_round(A, C, D, B, 8)
-#define __builtin_ia32_vfcmaddcph256_maskz_round(B, C, D, A, E)
__builtin_ia32_vfcmaddcph256_maskz_round(B, C, D, A, 8)
-#define __builtin_ia32_vfcmulcph256_round(A, B, C)
__builtin_ia32_vfcmulcph256_round(A, B, 8)
-#define __builtin_ia32_vfcmulcph256_mask_round(A, B, C, D, E)
__builtin_ia32_vfcmulcph256_mask_round(A, B, C, D, 8)
-#define __builtin_ia32_fixupimmpd256_mask_round(A, B, C, D, E, F)
__builtin_ia32_fixupimmpd256_mask_round(A, B, C, 1, E, 8)
-#define __builtin_ia32_fixupimmpd256_maskz_round(A, B, C, D, E, F)
__builtin_ia32_fixupimmpd256_maskz_round(A, B, C, 1, E, 8)
-#define __builtin_ia32_fixupimmps256_mask_round(A, B, C, D, E, F)
__builtin_ia32_fixupimmps256_mask_round(A, B, C, 1, E, 8)
-#define __builtin_ia32_fixupimmps256_maskz_round(A, B, C, D, E, F)
__builtin_ia32_fixupimmps256_maskz_round(A, B, C, 1, E, 8)
/* avx10_2-512mediaintrin.h */
#define __builtin_ia32_mpsadbw512(A, B, C) __builtin_ia32_mpsadbw512 (A, B, 1)
--
2.31.1
