This reverts commit 3d1b5530ea1d23e26dc5ab70aa4a2e7b9dc19b50.
---
gcc/config/i386/avx10_2roundingintrin.h | 286 ------------------
gcc/config/i386/i386-builtin-types.def | 1 -
gcc/config/i386/i386-builtin.def | 5 -
gcc/config/i386/i386-expand.cc | 1 -
gcc/testsuite/gcc.target/i386/avx-1.c | 5 -
.../gcc.target/i386/avx10_2-rounding-3.c | 58 ----
gcc/testsuite/gcc.target/i386/sse-13.c | 5 -
gcc/testsuite/gcc.target/i386/sse-14.c | 15 -
gcc/testsuite/gcc.target/i386/sse-22.c | 15 -
gcc/testsuite/gcc.target/i386/sse-23.c | 5 -
10 files changed, 396 deletions(-)
delete mode 100644 gcc/testsuite/gcc.target/i386/avx10_2-rounding-3.c
diff --git a/gcc/config/i386/avx10_2roundingintrin.h
b/gcc/config/i386/avx10_2roundingintrin.h
index f0ac3f15ce1..66268d24903 100644
--- a/gcc/config/i386/avx10_2roundingintrin.h
+++ b/gcc/config/i386/avx10_2roundingintrin.h
@@ -1757,183 +1757,6 @@ _mm256_maskz_cvt_roundepu64_ps (__mmask8 __U, __m256i
__A, const int __R)
(__mmask8) __U,
__R);
}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cvt_roundepu16_ph (__m256i __A, const int __R)
-{
- return (__m256h) __builtin_ia32_vcvtuw2ph256_mask_round ((__v16hi) __A,
- (__v16hf)
- _mm256_setzero_ph (),
- (__mmask16) -1,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_cvt_roundepu16_ph (__m256h __W, __mmask16 __U, __m256i __A,
- const int __R)
-{
- return (__m256h) __builtin_ia32_vcvtuw2ph256_mask_round ((__v16hi) __A,
- (__v16hf) __W,
- (__mmask16) __U,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_cvt_roundepu16_ph (__mmask16 __U, __m256i __A, const int __R)
-{
- return (__m256h) __builtin_ia32_vcvtuw2ph256_mask_round ((__v16hi) __A,
- (__v16hf)
- _mm256_setzero_ph (),
- (__mmask16) __U,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cvt_roundepi16_ph (__m256i __A, const int __R)
-{
- return (__m256h) __builtin_ia32_vcvtw2ph256_mask_round ((__v16hi) __A,
- (__v16hf)
- _mm256_setzero_ph (),
- (__mmask16) -1,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_cvt_roundepi16_ph (__m256h __W, __mmask16 __U, __m256i __A,
- const int __R)
-{
- return (__m256h) __builtin_ia32_vcvtw2ph256_mask_round ((__v16hi) __A,
- (__v16hf) __W,
- (__mmask16) __U,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_cvt_roundepi16_ph (__mmask16 __U, __m256i __A, const int __R)
-{
- return (__m256h) __builtin_ia32_vcvtw2ph256_mask_round ((__v16hi) __A,
- (__v16hf)
- _mm256_setzero_ph (),
- (__mmask16) __U,
- __R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_div_round_pd (__m256d __A, __m256d __B, const int __R)
-{
- return (__m256d) __builtin_ia32_divpd256_mask_round ((__v4df) __A,
- (__v4df) __B,
- (__v4df)
- _mm256_undefined_pd (),
- (__mmask8) -1,
- __R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_div_round_pd (__m256d __W, __mmask8 __U, __m256d __A,
- __m256d __B, const int __R)
-{
- return (__m256d) __builtin_ia32_divpd256_mask_round ((__v4df) __A,
- (__v4df) __B,
- (__v4df) __W,
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_div_round_pd (__mmask8 __U, __m256d __A, __m256d __B,
- const int __R)
-{
- return (__m256d) __builtin_ia32_divpd256_mask_round ((__v4df) __A,
- (__v4df) __B,
- (__v4df)
- _mm256_setzero_pd (),
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_div_round_ph (__m256h __A, __m256h __B, const int __R)
-{
- return (__m256h) __builtin_ia32_divph256_mask_round ((__v16hf) __A,
- (__v16hf) __B,
- (__v16hf)
- _mm256_setzero_ph (),
- (__mmask16) -1,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_div_round_ph (__m256h __W, __mmask16 __U, __m256h __A,
- __m256h __B, const int __R)
-{
- return (__m256h) __builtin_ia32_divph256_mask_round ((__v16hf) __A,
- (__v16hf) __B,
- (__v16hf) __W,
- (__mmask16) __U,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_div_round_ph (__mmask16 __U, __m256h __A, __m256h __B,
- const int __R)
-{
- return (__m256h) __builtin_ia32_divph256_mask_round ((__v16hf) __A,
- (__v16hf) __B,
- (__v16hf)
- _mm256_setzero_ph (),
- (__mmask16) __U,
- __R);
-}
-
-extern __inline __m256
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_div_round_ps (__m256 __A, __m256 __B, const int __R)
-{
- return (__m256) __builtin_ia32_divps256_mask_round ((__v8sf) __A,
- (__v8sf) __B,
- (__v8sf)
- _mm256_undefined_ps (),
- (__mmask8) -1,
- __R);
-}
-
-extern __inline __m256
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_div_round_ps (__m256 __W, __mmask8 __U, __m256 __A, __m256 __B,
- const int __R)
-{
- return (__m256) __builtin_ia32_divps256_mask_round ((__v8sf) __A,
- (__v8sf) __B,
- (__v8sf) __W,
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_div_round_ps (__mmask8 __U, __m256 __A, __m256 __B,
- const int __R)
-{
- return (__m256) __builtin_ia32_divps256_mask_round ((__v8sf) __A,
- (__v8sf) __B,
- (__v8sf)
- _mm256_setzero_ps (),
- (__mmask8) __U,
- __R);
-}
#else
#define _mm256_add_round_pd(A, B, R) \
((__m256d) __builtin_ia32_addpd256_mask_round ((__v4df) (A), \
@@ -2979,115 +2802,6 @@ _mm256_maskz_div_round_ps (__mmask8 __U, __m256 __A,
__m256 __B,
(_mm_setzero_ps ()), \
(__mmask8) (U), \
(R)))
-
-#define _mm256_cvt_roundepu16_ph(A, R) \
- ((__m256h) __builtin_ia32_vcvtuw2ph256_mask_round ((__v16hi) (A), \
- (__v16hf) \
- (_mm256_setzero_ph ()), \
- (__mmask16) (-1), \
- (R)))
-
-#define _mm256_mask_cvt_roundepu16_ph(W, U, A, R) \
- ((__m256h) __builtin_ia32_vcvtuw2ph256_mask_round ((__v16hi) (A), \
- (__v16hf) (W), \
- (__mmask16) (U), \
- (R)))
-
-#define _mm256_maskz_cvt_roundepu16_ph(U, A, R) \
- ((__m256h) __builtin_ia32_vcvtuw2ph256_mask_round ((__v16hi) (A), \
- (__v16hf) \
- (_mm256_setzero_ph ()), \
- (__mmask16) (U), \
- (R)))
-
-#define _mm256_cvt_roundepi16_ph(A, R) \
- ((__m256h) __builtin_ia32_vcvtw2ph256_mask_round ((__v16hi) (A), \
- (__v16hf) \
- (_mm256_setzero_ph ()), \
- (__mmask16) (-1), \
- (R)))
-
-#define _mm256_mask_cvt_roundepi16_ph(W, U, A, R) \
- ((__m256h) __builtin_ia32_vcvtw2ph256_mask_round ((__v16hi) (A), \
- (__v16hf) (W), \
- (__mmask16) (U), \
- (R)))
-
-#define _mm256_maskz_cvt_roundepi16_ph(U, A, R) \
- ((__m256h) __builtin_ia32_vcvtw2ph256_mask_round ((__v16hi) (A), \
- (__v16hf) \
- (_mm256_setzero_ph ()), \
- (__mmask16) (U), \
- (R)))
-
-#define _mm256_div_round_pd(A, B, R) \
- ((__m256d) __builtin_ia32_divpd256_mask_round ((__v4df) (A), \
- (__v4df) (B), \
- (__v4df) \
- (_mm256_undefined_pd ()), \
- (__mmask8) (-1), \
- (R)))
-
-#define _mm256_mask_div_round_pd(W, U, A, B, R) \
- ((__m256d) __builtin_ia32_divpd256_mask_round ((__v4df) (A), \
- (__v4df) (B), \
- (__v4df) (W), \
- (__mmask8) (U), \
- (R)))
-
-#define _mm256_maskz_div_round_pd(U, A, B, R) \
- ((__m256d) __builtin_ia32_divpd256_mask_round ((__v4df) (A), \
- (__v4df) (B), \
- (__v4df) \
- (_mm256_setzero_pd ()), \
- (__mmask8) (U), \
- (R)))
-
-#define _mm256_div_round_ph(A, B, R) \
- ((__m256h) __builtin_ia32_divph256_mask_round ((__v16hf) (A), \
- (__v16hf) (B), \
- (__v16hf) \
- (_mm256_setzero_ph ()), \
- (__mmask16) (-1), \
- (R)))
-
-#define _mm256_mask_div_round_ph(W, U, A, B, R) \
- ((__m256h) __builtin_ia32_divph256_mask_round ((__v16hf) (A), \
- (__v16hf) (B), \
- (__v16hf) (W), \
- (__mmask16) (U), \
- (R)))
-
-#define _mm256_maskz_div_round_ph(U, A, B, R) \
- ((__m256h) __builtin_ia32_divph256_mask_round ((__v16hf) (A), \
- (__v16hf) (B), \
- (__v16hf) \
- (_mm256_setzero_ph ()), \
- (__mmask16) (U), \
- (R)))
-
-#define _mm256_div_round_ps(A, B, R) \
- ((__m256) __builtin_ia32_divps256_mask_round ((__v8sf) (A), \
- (__v8sf) (B), \
- (__v8sf) \
- (_mm256_undefined_ps ()), \
- (__mmask8) (-1), \
- (R)))
-
-#define _mm256_mask_div_round_ps(W, U, A, B, R) \
- ((__m256) __builtin_ia32_divps256_mask_round ((__v8sf) (A), \
- (__v8sf) (B), \
- (__v8sf) (W), \
- (__mmask8) (U), \
- (R)))
-
-#define _mm256_maskz_div_round_ps(U, A, B, R) \
- ((__m256) __builtin_ia32_divps256_mask_round ((__v8sf) (A), \
- (__v8sf) (B), \
- (__v8sf) \
- (_mm256_setzero_ps ()), \
- (__mmask8) (U), \
- (R)))
#endif
#ifdef __DISABLE_AVX10_2_256__
diff --git a/gcc/config/i386/i386-builtin-types.def
b/gcc/config/i386/i386-builtin-types.def
index 2e18118da43..fc2f4929394 100644
--- a/gcc/config/i386/i386-builtin-types.def
+++ b/gcc/config/i386/i386-builtin-types.def
@@ -1440,7 +1440,6 @@ DEF_FUNCTION_TYPE (V4DI, V4SF, V4DI, UQI, INT)
DEF_FUNCTION_TYPE (V4DF, V4DI, V4DF, UQI, INT)
DEF_FUNCTION_TYPE (V8HF, V4DI, V8HF, UQI, INT)
DEF_FUNCTION_TYPE (V4SF, V4DI, V4SF, UQI, INT)
-DEF_FUNCTION_TYPE (V16HF, V16HI, V16HF, UHI, INT)
DEF_FUNCTION_TYPE (V32HF, V16SF, V16SF, V32HF, USI, INT)
DEF_FUNCTION_TYPE (V32HF, V16SF, V16SF, V32HF, USI)
DEF_FUNCTION_TYPE (V16HF, V8SF, V8SF, V16HF, UHI)
diff --git a/gcc/config/i386/i386-builtin.def b/gcc/config/i386/i386-builtin.def
index 91d8896733d..5c975342dee 100644
--- a/gcc/config/i386/i386-builtin.def
+++ b/gcc/config/i386/i386-builtin.def
@@ -3711,11 +3711,6 @@ BDESC (0, OPTION_MASK_ISA2_AVX10_2_256,
CODE_FOR_floatunsv8siv8sf2_mask_round, "
BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_floatunsv4div4df2_mask_round,
"__builtin_ia32_cvtuqq2pd256_mask_round",
IX86_BUILTIN_VCVTUQQ2PD256_MASK_ROUND, UNKNOWN, (int)
V4DF_FTYPE_V4DI_V4DF_UQI_INT)
BDESC (0, OPTION_MASK_ISA2_AVX10_2_256,
CODE_FOR_avx512fp16_vcvtuqq2ph_v4di_mask_round,
"__builtin_ia32_vcvtuqq2ph256_mask_round",
IX86_BUILTIN_VCVTUQQ2PH256_MASK_ROUND, UNKNOWN, (int)
V8HF_FTYPE_V4DI_V8HF_UQI_INT)
BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_floatunsv4div4sf2_mask_round,
"__builtin_ia32_cvtuqq2ps256_mask_round",
IX86_BUILTIN_VCVTUQQ2PS256_MASK_ROUND, UNKNOWN, (int)
V4SF_FTYPE_V4DI_V4SF_UQI_INT)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256,
CODE_FOR_avx512fp16_vcvtuw2ph_v16hi_mask_round,
"__builtin_ia32_vcvtuw2ph256_mask_round", IX86_BUILTIN_VCVTUW2PH256_MASK_ROUND,
UNKNOWN, (int) V16HF_FTYPE_V16HI_V16HF_UHI_INT)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256,
CODE_FOR_avx512fp16_vcvtw2ph_v16hi_mask_round,
"__builtin_ia32_vcvtw2ph256_mask_round", IX86_BUILTIN_VCVTW2PH256_MASK_ROUND,
UNKNOWN, (int) V16HF_FTYPE_V16HI_V16HF_UHI_INT)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx_divv4df3_mask_round,
"__builtin_ia32_divpd256_mask_round", IX86_BUILTIN_VDIVPD256_MASK_ROUND,
UNKNOWN, (int) V4DF_FTYPE_V4DF_V4DF_V4DF_UQI_INT)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256,
CODE_FOR_avx512fp16_divv16hf3_mask_round, "__builtin_ia32_divph256_mask_round",
IX86_BUILTIN_VDIVPH256_MASK_ROUND, UNKNOWN, (int)
V16HF_FTYPE_V16HF_V16HF_V16HF_UHI_INT)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx_divv8sf3_mask_round,
"__builtin_ia32_divps256_mask_round", IX86_BUILTIN_VDIVPS256_MASK_ROUND,
UNKNOWN, (int) V8SF_FTYPE_V8SF_V8SF_V8SF_UQI_INT)
BDESC (0, OPTION_MASK_ISA2_AVX10_2_512,
CODE_FOR_avx10_2_cvt2ps2phx_v32hf_mask_round,
"__builtin_ia32_vcvt2ps2phx512_mask_round",
IX86_BUILTIN_VCVT2PS2PHX_V32HF_MASK_ROUND, UNKNOWN, (int)
V32HF_FTYPE_V16SF_V16SF_V32HF_USI_INT)
BDESC (0, OPTION_MASK_ISA2_AVX10_2_512,
CODE_FOR_avx10_2_cvtph2ibsv32hf_mask_round,
"__builtin_ia32_cvtph2ibs512_mask_round", IX86_BUILTIN_CVTPH2IBS512_MASK_ROUND,
UNKNOWN, (int) V32HI_FTYPE_V32HF_V32HI_USI_INT)
BDESC (0, OPTION_MASK_ISA2_AVX10_2_512,
CODE_FOR_avx10_2_cvtph2iubsv32hf_mask_round,
"__builtin_ia32_cvtph2iubs512_mask_round",
IX86_BUILTIN_CVTPH2IUBS512_MASK_ROUND, UNKNOWN, (int)
V32HI_FTYPE_V32HF_V32HI_USI_INT)
diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc
index 8df86af6a01..d4c765c9587 100644
--- a/gcc/config/i386/i386-expand.cc
+++ b/gcc/config/i386/i386-expand.cc
@@ -12772,7 +12772,6 @@ ix86_expand_round_builtin (const struct
builtin_description *d,
case V8HF_FTYPE_V4DF_V8HF_UQI_INT:
case V8HF_FTYPE_V4DI_V8HF_UQI_INT:
case V16HF_FTYPE_V16SF_V16HF_UHI_INT:
- case V16HF_FTYPE_V16HI_V16HF_UHI_INT:
case V16HI_FTYPE_V16BF_V16HI_UHI_INT:
case V8HF_FTYPE_V8HF_V8HF_V8HF_INT:
nargs = 4;
diff --git a/gcc/testsuite/gcc.target/i386/avx-1.c
b/gcc/testsuite/gcc.target/i386/avx-1.c
index a64c96c0832..939bf2b981b 100644
--- a/gcc/testsuite/gcc.target/i386/avx-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx-1.c
@@ -894,11 +894,6 @@
#define __builtin_ia32_cvtuqq2pd256_mask_round(A, B, C, D)
__builtin_ia32_cvtuqq2pd256_mask_round(A, B, C, 8)
#define __builtin_ia32_vcvtuqq2ph256_mask_round(A, B, C, D)
__builtin_ia32_vcvtuqq2ph256_mask_round(A, B, C, 8)
#define __builtin_ia32_cvtuqq2ps256_mask_round(A, B, C, D)
__builtin_ia32_cvtuqq2ps256_mask_round(A, B, C, 8)
-#define __builtin_ia32_vcvtuw2ph256_mask_round(A, B, C, D)
__builtin_ia32_vcvtuw2ph256_mask_round(A, B, C, 8)
-#define __builtin_ia32_vcvtw2ph256_mask_round(A, B, C, D)
__builtin_ia32_vcvtw2ph256_mask_round(A, B, C, 8)
-#define __builtin_ia32_divpd256_mask_round(A, B, C, D, E)
__builtin_ia32_divpd256_mask_round(A, B, C, D, 8)
-#define __builtin_ia32_divph256_mask_round(A, B, C, D, E)
__builtin_ia32_divph256_mask_round(A, B, C, D, 8)
-#define __builtin_ia32_divps256_mask_round(A, B, C, D, E)
__builtin_ia32_divps256_mask_round(A, B, C, D, 8)
/* avx10_2-512mediaintrin.h */
#define __builtin_ia32_mpsadbw512(A, B, C) __builtin_ia32_mpsadbw512 (A, B, 1)
diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-rounding-3.c
b/gcc/testsuite/gcc.target/i386/avx10_2-rounding-3.c
deleted file mode 100644
index 1e6b3628b74..00000000000
--- a/gcc/testsuite/gcc.target/i386/avx10_2-rounding-3.c
+++ /dev/null
@@ -1,58 +0,0 @@
-/* { dg-do compile } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
-/* { dg-final { scan-assembler-times "vcvtuw2ph\[
\\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvtuw2ph\[
\\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvtuw2ph\[
\\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvtw2ph\[
\\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvtw2ph\[
\\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvtw2ph\[
\\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vdivpd\[
\\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vdivpd\[
\\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1
} } */
-/* { dg-final { scan-assembler-times "vdivpd\[
\\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[
\\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vdivph\[
\\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[
\\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vdivph\[
\\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vdivph\[
\\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vdivps\[
\\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vdivps\[
\\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1
} } */
-/* { dg-final { scan-assembler-times "vdivps\[
\\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[
\\t\]+#)" 1 } } */
-
-#include <immintrin.h>
-
-volatile __m128 hx;
-volatile __m128i hxi;
-volatile __m128h hxh;
-volatile __m256 x;
-volatile __m256d xd;
-volatile __m256h xh;
-volatile __m256i xi;
-volatile __mmask8 m8;
-volatile __mmask16 m16;
-volatile __mmask32 m32;
-
-void extern
-avx10_2_test_1 (void)
-{
- xh = _mm256_cvt_roundepu16_ph (xi, 4);
- xh = _mm256_mask_cvt_roundepu16_ph (xh, m16, xi, 8);
- xh = _mm256_maskz_cvt_roundepu16_ph (m16, xi, 11);
-
- xh = _mm256_cvt_roundepi16_ph (xi, 4);
- xh = _mm256_mask_cvt_roundepi16_ph (xh, m16, xi, 8);
- xh = _mm256_maskz_cvt_roundepi16_ph (m16, xi, 11);
-}
-
-void extern
-avx10_2_test_2 (void)
-{
- xd = _mm256_div_round_pd (xd, xd, _MM_FROUND_TO_NEAREST_INT |
_MM_FROUND_NO_EXC);
- xd = _mm256_mask_div_round_pd (xd, m8, xd, xd, _MM_FROUND_TO_NEG_INF |
_MM_FROUND_NO_EXC);
- xd = _mm256_maskz_div_round_pd (m8, xd, xd, _MM_FROUND_TO_ZERO |
_MM_FROUND_NO_EXC);
-
- xh = _mm256_div_round_ph (xh, xh, 8);
- xh = _mm256_mask_div_round_ph (xh, m16, xh, xh, 8);
- xh = _mm256_maskz_div_round_ph (m16, xh, xh, 11);
-
- x = _mm256_div_round_ps (x, x, _MM_FROUND_TO_NEAREST_INT |
_MM_FROUND_NO_EXC);
- x = _mm256_mask_div_round_ps (x, m16, x, x, _MM_FROUND_TO_POS_INF |
_MM_FROUND_NO_EXC);
- x = _mm256_maskz_div_round_ps (m16, x, x, _MM_FROUND_TO_ZERO |
_MM_FROUND_NO_EXC);
-}
diff --git a/gcc/testsuite/gcc.target/i386/sse-13.c
b/gcc/testsuite/gcc.target/i386/sse-13.c
index 9c15611da96..8fd8a2c37e3 100644
--- a/gcc/testsuite/gcc.target/i386/sse-13.c
+++ b/gcc/testsuite/gcc.target/i386/sse-13.c
@@ -901,11 +901,6 @@
#define __builtin_ia32_cvtuqq2pd256_mask_round(A, B, C, D)
__builtin_ia32_cvtuqq2pd256_mask_round(A, B, C, 8)
#define __builtin_ia32_vcvtuqq2ph256_mask_round(A, B, C, D)
__builtin_ia32_vcvtuqq2ph256_mask_round(A, B, C, 8)
#define __builtin_ia32_cvtuqq2ps256_mask_round(A, B, C, D)
__builtin_ia32_cvtuqq2ps256_mask_round(A, B, C, 8)
-#define __builtin_ia32_vcvtuw2ph256_mask_round(A, B, C, D)
__builtin_ia32_vcvtuw2ph256_mask_round(A, B, C, 8)
-#define __builtin_ia32_vcvtw2ph256_mask_round(A, B, C, D)
__builtin_ia32_vcvtw2ph256_mask_round(A, B, C, 8)
-#define __builtin_ia32_divpd256_mask_round(A, B, C, D, E)
__builtin_ia32_divpd256_mask_round(A, B, C, D, 8)
-#define __builtin_ia32_divph256_mask_round(A, B, C, D, E)
__builtin_ia32_divph256_mask_round(A, B, C, D, 8)
-#define __builtin_ia32_divps256_mask_round(A, B, C, D, E)
__builtin_ia32_divps256_mask_round(A, B, C, D, 8)
/* avx10_2-512mediaintrin.h */
#define __builtin_ia32_mpsadbw512(A, B, C) __builtin_ia32_mpsadbw512 (A, B, 1)
diff --git a/gcc/testsuite/gcc.target/i386/sse-14.c
b/gcc/testsuite/gcc.target/i386/sse-14.c
index bafe31dc4e8..4e2ec1103db 100644
--- a/gcc/testsuite/gcc.target/i386/sse-14.c
+++ b/gcc/testsuite/gcc.target/i386/sse-14.c
@@ -1064,8 +1064,6 @@ test_1 (_mm256_cvt_roundepu32_ps, __m256, __m256i, 9)
test_1 (_mm256_cvt_roundepu64_pd, __m256d, __m256i, 9)
test_1 (_mm256_cvt_roundepu64_ph, __m128h, __m256i, 9)
test_1 (_mm256_cvt_roundepu64_ps, __m128, __m256i, 9)
-test_1 (_mm256_cvt_roundepu16_ph, __m256h, __m256i, 8)
-test_1 (_mm256_cvt_roundepi16_ph, __m256h, __m256i, 8)
test_2 (_mm256_add_round_pd, __m256d, __m256d, __m256d, 9)
test_2 (_mm256_add_round_ph, __m256h, __m256h, __m256h, 8)
test_2 (_mm256_add_round_ps, __m256, __m256, __m256, 9)
@@ -1114,11 +1112,6 @@ test_2 (_mm256_maskz_cvt_roundepu32_ps, __m256,
__mmask8, __m256i, 9)
test_2 (_mm256_maskz_cvt_roundepu64_pd, __m256d, __mmask8, __m256i, 9)
test_2 (_mm256_maskz_cvt_roundepu64_ph, __m128h, __mmask8, __m256i, 8)
test_2 (_mm256_maskz_cvt_roundepu64_ps, __m128, __mmask8, __m256i, 9)
-test_2 (_mm256_maskz_cvt_roundepu16_ph, __m256h, __mmask16, __m256i, 8)
-test_2 (_mm256_maskz_cvt_roundepi16_ph, __m256h, __mmask16, __m256i, 8)
-test_2 (_mm256_div_round_pd, __m256d, __m256d, __m256d, 9)
-test_2 (_mm256_div_round_ph, __m256h, __m256h, __m256h, 9)
-test_2 (_mm256_div_round_ps, __m256, __m256, __m256, 9)
test_2x (_mm256_cmp_round_pd_mask, __mmask8, __m256d, __m256d, 1, 8)
test_2x (_mm256_cmp_round_ph_mask, __mmask16, __m256h, __m256h, 1, 8)
test_2x (_mm256_cmp_round_ps_mask, __mmask8, __m256, __m256, 1, 8)
@@ -1170,20 +1163,12 @@ test_3 (_mm256_mask_cvt_roundepu32_ps, __m256, __m256,
__mmask8, __m256i, 9)
test_3 (_mm256_mask_cvt_roundepu64_pd, __m256d, __m256d, __mmask8, __m256i, 9)
test_3 (_mm256_mask_cvt_roundepu64_ph, __m128h, __m128h, __mmask8, __m256i, 8)
test_3 (_mm256_mask_cvt_roundepu64_ps, __m128, __m128, __mmask8, __m256i, 9)
-test_3 (_mm256_mask_cvt_roundepu16_ph, __m256h, __m256h, __mmask16, __m256i, 8)
-test_3 (_mm256_mask_cvt_roundepi16_ph, __m256h, __m256h, __mmask16, __m256i, 8)
-test_3 (_mm256_maskz_div_round_pd, __m256d, __mmask8, __m256d, __m256d, 9)
-test_3 (_mm256_maskz_div_round_ph, __m256h, __mmask8, __m256h, __m256h, 9)
-test_3 (_mm256_maskz_div_round_ps, __m256, __mmask8, __m256, __m256, 9)
test_3x (_mm256_mask_cmp_round_pd_mask, __mmask8, __mmask8, __m256d, __m256d,
1, 8)
test_3x (_mm256_mask_cmp_round_ph_mask, __mmask16, __mmask16, __m256h,
__m256h, 1, 8)
test_3x (_mm256_mask_cmp_round_ps_mask, __mmask8, __mmask8, __m256, __m256, 1,
8)
test_4 (_mm256_mask_add_round_pd, __m256d, __m256d, __mmask8, __m256d,
__m256d, 9)
test_4 (_mm256_mask_add_round_ph, __m256h, __m256h, __mmask16, __m256h,
__m256h, 8)
test_4 (_mm256_mask_add_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9)
-test_4 (_mm256_mask_div_round_pd, __m256d, __m256d, __mmask8, __m256d,
__m256d, 9)
-test_4 (_mm256_mask_div_round_ph, __m256h, __m256h, __mmask8, __m256h,
__m256h, 9)
-test_4 (_mm256_mask_div_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9)
/* avx10_2-512mediaintrin.h */
test_2 (_mm512_mpsadbw_epu8, __m512i, __m512i, __m512i, 1)
diff --git a/gcc/testsuite/gcc.target/i386/sse-22.c
b/gcc/testsuite/gcc.target/i386/sse-22.c
index 4cfbf30cfab..d96ea32dbc2 100644
--- a/gcc/testsuite/gcc.target/i386/sse-22.c
+++ b/gcc/testsuite/gcc.target/i386/sse-22.c
@@ -1107,8 +1107,6 @@ test_1 (_mm256_cvt_roundepu32_ps, __m256, __m256i, 9)
test_1 (_mm256_cvt_roundepu64_pd, __m256d, __m256i, 9)
test_1 (_mm256_cvt_roundepu64_ph, __m128h, __m256i, 9)
test_1 (_mm256_cvt_roundepu64_ps, __m128, __m256i, 9)
-test_1 (_mm256_cvt_roundepu16_ph, __m256h, __m256i, 8)
-test_1 (_mm256_cvt_roundepi16_ph, __m256h, __m256i, 8)
test_2 (_mm256_add_round_pd, __m256d, __m256d, __m256d, 9)
test_2 (_mm256_add_round_ph, __m256h, __m256h, __m256h, 8)
test_2 (_mm256_add_round_ps, __m256, __m256, __m256, 9)
@@ -1157,11 +1155,6 @@ test_2 (_mm256_maskz_cvt_roundepu32_ps, __m256,
__mmask8, __m256i, 9)
test_2 (_mm256_maskz_cvt_roundepu64_pd, __m256d, __mmask8, __m256i, 9)
test_2 (_mm256_maskz_cvt_roundepu64_ph, __m128h, __mmask8, __m256i, 8)
test_2 (_mm256_maskz_cvt_roundepu64_ps, __m128, __mmask8, __m256i, 9)
-test_2 (_mm256_maskz_cvt_roundepu16_ph, __m256h, __mmask16, __m256i, 8)
-test_2 (_mm256_maskz_cvt_roundepi16_ph, __m256h, __mmask16, __m256i, 8)
-test_2 (_mm256_div_round_pd, __m256d, __m256d, __m256d, 9)
-test_2 (_mm256_div_round_ph, __m256h, __m256h, __m256h, 9)
-test_2 (_mm256_div_round_ps, __m256, __m256, __m256, 9)
test_2x (_mm256_cmp_round_pd_mask, __mmask8, __m256d, __m256d, 1, 8)
test_2x (_mm256_cmp_round_ph_mask, __mmask16, __m256h, __m256h, 1, 8)
test_2x (_mm256_cmp_round_ps_mask, __mmask8, __m256, __m256, 1, 8)
@@ -1213,20 +1206,12 @@ test_3 (_mm256_mask_cvt_roundepu32_ps, __m256, __m256,
__mmask8, __m256i, 9)
test_3 (_mm256_mask_cvt_roundepu64_pd, __m256d, __m256d, __mmask8, __m256i, 9)
test_3 (_mm256_mask_cvt_roundepu64_ph, __m128h, __m128h, __mmask8, __m256i, 8)
test_3 (_mm256_mask_cvt_roundepu64_ps, __m128, __m128, __mmask8, __m256i, 9)
-test_3 (_mm256_mask_cvt_roundepu16_ph, __m256h, __m256h, __mmask16, __m256i, 8)
-test_3 (_mm256_mask_cvt_roundepi16_ph, __m256h, __m256h, __mmask16, __m256i, 8)
-test_3 (_mm256_maskz_div_round_pd, __m256d, __mmask8, __m256d, __m256d, 9)
-test_3 (_mm256_maskz_div_round_ph, __m256h, __mmask8, __m256h, __m256h, 9)
-test_3 (_mm256_maskz_div_round_ps, __m256, __mmask8, __m256, __m256, 9)
test_3x (_mm256_mask_cmp_round_pd_mask, __mmask8, __mmask8, __m256d, __m256d,
1, 8)
test_3x (_mm256_mask_cmp_round_ph_mask, __mmask16, __mmask16, __m256h,
__m256h, 1, 8)
test_3x (_mm256_mask_cmp_round_ps_mask, __mmask8, __mmask8, __m256, __m256, 1,
8)
test_4 (_mm256_mask_add_round_pd, __m256d, __m256d, __mmask8, __m256d,
__m256d, 9)
test_4 (_mm256_mask_add_round_ph, __m256h, __m256h, __mmask16, __m256h,
__m256h, 8)
test_4 (_mm256_mask_add_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9)
-test_4 (_mm256_mask_div_round_pd, __m256d, __m256d, __mmask8, __m256d,
__m256d, 9)
-test_4 (_mm256_mask_div_round_ph, __m256h, __m256h, __mmask8, __m256h,
__m256h, 9)
-test_4 (_mm256_mask_div_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9)
/* avx10_2-512mediaintrin.h */
test_2 (_mm512_mpsadbw_epu8, __m512i, __m512i, __m512i, 1)
diff --git a/gcc/testsuite/gcc.target/i386/sse-23.c
b/gcc/testsuite/gcc.target/i386/sse-23.c
index d249917b61b..66dbac9997f 100644
--- a/gcc/testsuite/gcc.target/i386/sse-23.c
+++ b/gcc/testsuite/gcc.target/i386/sse-23.c
@@ -876,11 +876,6 @@
#define __builtin_ia32_cvtuqq2pd256_mask_round(A, B, C, D)
__builtin_ia32_cvtuqq2pd256_mask_round(A, B, C, 8)
#define __builtin_ia32_vcvtuqq2ph256_mask_round(A, B, C, D)
__builtin_ia32_vcvtuqq2ph256_mask_round(A, B, C, 8)
#define __builtin_ia32_cvtuqq2ps256_mask_round(A, B, C, D)
__builtin_ia32_cvtuqq2ps256_mask_round(A, B, C, 8)
-#define __builtin_ia32_vcvtuw2ph256_mask_round(A, B, C, D)
__builtin_ia32_vcvtuw2ph256_mask_round(A, B, C, 8)
-#define __builtin_ia32_vcvtw2ph256_mask_round(A, B, C, D)
__builtin_ia32_vcvtw2ph256_mask_round(A, B, C, 8)
-#define __builtin_ia32_divpd256_mask_round(A, B, C, D, E)
__builtin_ia32_divpd256_mask_round(A, B, C, D, 8)
-#define __builtin_ia32_divph256_mask_round(A, B, C, D, E)
__builtin_ia32_divph256_mask_round(A, B, C, D, 8)
-#define __builtin_ia32_divps256_mask_round(A, B, C, D, E)
__builtin_ia32_divps256_mask_round(A, B, C, D, 8)
/* avx10_2-512mediaintrin.h */
#define __builtin_ia32_mpsadbw512(A, B, C) __builtin_ia32_mpsadbw512 (A, B, 1)
--
2.31.1
