> > Thanks for running these. I saw poor results for perlbench with my > initial aarch64 hooks because the hooks reduced the cost to zero for > the entry case: > > auto entry_cost = targetm.callee_save_cost > (spill_cost_type::SAVE, hard_regno, mode, saved_nregs, > ira_memory_move_cost[mode][rclass][0] * saved_nregs / nregs, > allocated_callee_save_regs, existing_spills_p); > /* In the event of a tie between caller-save and callee-save, > prefer callee-save. We apply this to the entry cost rather > than the exit cost since the entry frequency must be at > least as high as the exit frequency. */ > if (entry_cost > 0) > entry_cost -= 1; > > I "fixed" that by bumping the cost to a minimum of 2, but I was > wondering whether the "entry_cost > 0" should instead be "entry_cost > 1", > so that the cost is always greater than not using a callee save for > registers that don't cross a call. WDYT?
For x86 perfomance costs, the push cost should be memory_move_cost which is 6, -2 for adjustment in the target hook and -1 for this. So cost should not be 0 I think. For size cost, I currently return 1, so we indeed get 0 after adjustment. I think cost of 0 will make us to pick callee save even if caller save is available and there are no function calls, so I guess we do not want that.... Honza
