Hi all, Recently, DMR ISAs got lots of changes in mnemonics. The detailed change are:
- NE would be removed for all AVX10.2 new insns - VCOMSBF16 -> VCOMISBF16 - P for packed omitted for AI data types (BF16, TF32, FP8) For AMX-AVX512 change, it has been upstreamed previouslv, the remaining change are all related to AVX10.2. Ref: https://www.intel.com/content/www/us/en/content-details/844829/intel-advanced-vector-extensions-10-2-intel-avx10-2-architecture-specification.html You could also refer to the thread in Binutils previously for some more information: https://sourceware.org/pipermail/binutils/2025-January/138577.html Binutils has applied all the above changes prior to GCC due to its release window. Now it is the time for GCC to get re-aligned with Binutils. Besides all the mnemonics change, there will also be two more changes: - Due to Binutils pair tile register handle, we will need to adjust intrin usage for AMX-MOVRS and AMX-TRANSPOSE testcases to avoid warnings. - Since we will omit P for packed for AI data types, we will also omit "p" for packed in intrin name for FP8 since its introduction in AVX10.2. For BF16, we will still stick to the current mixed status in intrin name. The upcoming 13 patches are all related to the changes. Ok for trunk? Thx, Haochen
