gcc/ChangeLog:
PR target/118270
* config/i386/avx10_2-512satcvtintrin.h: Change intrin and
builtin name according to new mnemonics.
* config/i386/avx10_2satcvtintrin.h: Ditto.
* config/i386/i386-builtin.def (BDESC): Ditto.
* config/i386/sse.md
(UNSPEC_VCVTBF162IBS): Rename from UNSPEC_VCVTNEBF162IBS.
(UNSPEC_VCVTBF162IUBS): Rename from UNSPEC_VCVTNEBF162IUBS.
(UNSPEC_VCVTTBF162IBS): Rename from UNSPEC_VCVTTNEBF162IBS.
(UNSPEC_VCVTTBF162IUBS): Rename from UNSPEC_VCVTTNEBF162IUBS.
(UNSPEC_CVTNE_BF16_IBS_ITER): Rename to...
(UNSPEC_CVT_BF16_IBS_ITER): ...this. Adjust UNSPEC name.
(sat_cvt_sign_prefix): Adjust UNSPEC name.
(sat_cvt_trunc_prefix): Ditto.
(avx10_2_cvt<sat_cvt_trunc_prefix>nebf162i<sat_cvt_sign_prefix>bs<mode><mask_name>):
Rename to...
(avx10_2_cvt<sat_cvt_trunc_prefix>bf162i<sat_cvt_sign_prefix>bs<mode><mask_name>):
...this. Change instruction name output.
gcc/testsuite/ChangeLog:
PR target/118270
* gcc.target/i386/avx10_2-512-satcvt-1.c: Adjust output and
intrin call.
* gcc.target/i386/avx10_2-512-vcvtnebf162ibs-2.c: Move to...
* gcc.target/i386/avx10_2-512-vcvtbf162ibs-2.c: ...here.
Adjust intrin call.
* gcc.target/i386/avx10_2-512-vcvtnebf162iubs-2.c: Move to...
* gcc.target/i386/avx10_2-512-vcvtbf162iubs-2.c: ...here.
Adjust intrin call.
* gcc.target/i386/avx10_2-512-vcvttnebf162ibs-2.c: Move to...
* gcc.target/i386/avx10_2-512-vcvttbf162ibs-2.c: ...here.
Adjust intrin call.
* gcc.target/i386/avx10_2-512-vcvttnebf162iubs-2.c: Move to...
* gcc.target/i386/avx10_2-512-vcvttbf162iubs-2.c: ...here.
Adjust intrin call.
* gcc.target/i386/avx10_2-satcvt-1.c: Adjust output and
intrin call.
* gcc.target/i386/avx10_2-vcvtnebf162ibs-2.c: Move to...
* gcc.target/i386/avx10_2-vcvtbf162ibs-2.c: ...here.
Adjust intrin call.
* gcc.target/i386/avx10_2-vcvtnebf162iubs-2.c: Move to...
* gcc.target/i386/avx10_2-vcvtbf162iubs-2.c: ...here.
Adjust intrin call.
* gcc.target/i386/avx10_2-vcvttnebf162ibs-2.c: Move to...
* gcc.target/i386/avx10_2-vcvttbf162ibs-2.c: ...here.
Adjust intrin call.
* gcc.target/i386/avx10_2-vcvttnebf162iubs-2.c: Move to...
* gcc.target/i386/avx10_2-vcvttbf162iubs-2.c: ...here.
Adjust intrin call.
---
gcc/config/i386/avx10_2-512satcvtintrin.h | 111 ++++----
gcc/config/i386/avx10_2satcvtintrin.h | 265 +++++++-----------
gcc/config/i386/i386-builtin.def | 24 +-
gcc/config/i386/sse.md | 40 +--
.../gcc.target/i386/avx10_2-512-satcvt-1.c | 48 ++--
...62ibs-2.c => avx10_2-512-vcvtbf162ibs-2.c} | 6 +-
...iubs-2.c => avx10_2-512-vcvtbf162iubs-2.c} | 6 +-
...2ibs-2.c => avx10_2-512-vcvttbf162ibs-2.c} | 6 +-
...ubs-2.c => avx10_2-512-vcvttbf162iubs-2.c} | 6 +-
.../gcc.target/i386/avx10_2-satcvt-1.c | 96 +++----
...ebf162ibs-2.c => avx10_2-vcvtbf162ibs-2.c} | 4 +-
...f162iubs-2.c => avx10_2-vcvtbf162iubs-2.c} | 4 +-
...bf162ibs-2.c => avx10_2-vcvttbf162ibs-2.c} | 4 +-
...162iubs-2.c => avx10_2-vcvttbf162iubs-2.c} | 4 +-
14 files changed, 287 insertions(+), 337 deletions(-)
rename gcc/testsuite/gcc.target/i386/{avx10_2-512-vcvtnebf162ibs-2.c =>
avx10_2-512-vcvtbf162ibs-2.c} (87%)
rename gcc/testsuite/gcc.target/i386/{avx10_2-512-vcvtnebf162iubs-2.c =>
avx10_2-512-vcvtbf162iubs-2.c} (88%)
rename gcc/testsuite/gcc.target/i386/{avx10_2-512-vcvttnebf162ibs-2.c =>
avx10_2-512-vcvttbf162ibs-2.c} (87%)
rename gcc/testsuite/gcc.target/i386/{avx10_2-512-vcvttnebf162iubs-2.c =>
avx10_2-512-vcvttbf162iubs-2.c} (87%)
rename gcc/testsuite/gcc.target/i386/{avx10_2-vcvtnebf162ibs-2.c =>
avx10_2-vcvtbf162ibs-2.c} (78%)
rename gcc/testsuite/gcc.target/i386/{avx10_2-vcvtnebf162iubs-2.c =>
avx10_2-vcvtbf162iubs-2.c} (77%)
rename gcc/testsuite/gcc.target/i386/{avx10_2-vcvttnebf162ibs-2.c =>
avx10_2-vcvttbf162ibs-2.c} (77%)
rename gcc/testsuite/gcc.target/i386/{avx10_2-vcvttnebf162iubs-2.c =>
avx10_2-vcvttbf162iubs-2.c} (77%)
diff --git a/gcc/config/i386/avx10_2-512satcvtintrin.h
b/gcc/config/i386/avx10_2-512satcvtintrin.h
index 902bb884a57..6e864a9a6f8 100644
--- a/gcc/config/i386/avx10_2-512satcvtintrin.h
+++ b/gcc/config/i386/avx10_2-512satcvtintrin.h
@@ -36,126 +36,125 @@
extern __inline __m512i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm512_ipcvtnebf16_epi16 (__m512bh __A)
+_mm512_ipcvtbf16_epi16 (__m512bh __A)
{
return
- (__m512i) __builtin_ia32_cvtnebf162ibs512_mask ((__v32bf) __A,
- (__v32hi)
- _mm512_undefined_si512 (),
- (__mmask32) -1);
+ (__m512i) __builtin_ia32_cvtbf162ibs512_mask ((__v32bf) __A,
+ (__v32hi)
+ _mm512_undefined_si512 (),
+ (__mmask32) -1);
}
extern __inline __m512i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm512_mask_ipcvtnebf16_epi16 (__m512i __W, __mmask32 __U, __m512bh __A)
+_mm512_mask_ipcvtbf16_epi16 (__m512i __W, __mmask32 __U, __m512bh __A)
{
- return (__m512i) __builtin_ia32_cvtnebf162ibs512_mask ((__v32bf) __A,
- (__v32hi) __W,
- (__mmask32) __U);
+ return (__m512i) __builtin_ia32_cvtbf162ibs512_mask ((__v32bf) __A,
+ (__v32hi) __W,
+ (__mmask32) __U);
}
extern __inline __m512i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm512_maskz_ipcvtnebf16_epi16 (__mmask32 __U, __m512bh __A)
+_mm512_maskz_ipcvtbf16_epi16 (__mmask32 __U, __m512bh __A)
{
return
- (__m512i) __builtin_ia32_cvtnebf162ibs512_mask ((__v32bf) __A,
- (__v32hi)
- _mm512_setzero_si512 (),
- (__mmask32) __U);
+ (__m512i) __builtin_ia32_cvtbf162ibs512_mask ((__v32bf) __A,
+ (__v32hi)
+ _mm512_setzero_si512 (),
+ (__mmask32) __U);
}
extern __inline __m512i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm512_ipcvtnebf16_epu16 (__m512bh __A)
+_mm512_ipcvtbf16_epu16 (__m512bh __A)
{
return
- (__m512i) __builtin_ia32_cvtnebf162iubs512_mask ((__v32bf) __A,
- (__v32hi)
- _mm512_undefined_si512 (),
- (__mmask32) -1);
+ (__m512i) __builtin_ia32_cvtbf162iubs512_mask ((__v32bf) __A,
+ (__v32hi)
+ _mm512_undefined_si512 (),
+ (__mmask32) -1);
}
extern __inline __m512i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm512_mask_ipcvtnebf16_epu16 (__m512i __W, __mmask32 __U, __m512bh __A)
+_mm512_mask_ipcvtbf16_epu16 (__m512i __W, __mmask32 __U, __m512bh __A)
{
- return (__m512i) __builtin_ia32_cvtnebf162iubs512_mask ((__v32bf) __A,
- (__v32hi) __W,
- (__mmask32) __U);
+ return (__m512i) __builtin_ia32_cvtbf162iubs512_mask ((__v32bf) __A,
+ (__v32hi) __W,
+ (__mmask32) __U);
}
extern __inline __m512i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm512_maskz_ipcvtnebf16_epu16 (__mmask32 __U, __m512bh __A)
+_mm512_maskz_ipcvtbf16_epu16 (__mmask32 __U, __m512bh __A)
{
return
- (__m512i) __builtin_ia32_cvtnebf162iubs512_mask ((__v32bf) __A,
- (__v32hi)
- _mm512_setzero_si512 (),
- (__mmask32) __U);
+ (__m512i) __builtin_ia32_cvtbf162iubs512_mask ((__v32bf) __A,
+ (__v32hi)
+ _mm512_setzero_si512 (),
+ (__mmask32) __U);
}
extern __inline __m512i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm512_ipcvttnebf16_epi16 (__m512bh __A)
+_mm512_ipcvttbf16_epi16 (__m512bh __A)
{
return
- (__m512i) __builtin_ia32_cvttnebf162ibs512_mask ((__v32bf) __A,
- (__v32hi)
- _mm512_undefined_si512 (),
- (__mmask32) -1);
+ (__m512i) __builtin_ia32_cvttbf162ibs512_mask ((__v32bf) __A,
+ (__v32hi)
+ _mm512_undefined_si512 (),
+ (__mmask32) -1);
}
extern __inline __m512i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm512_mask_ipcvttnebf16_epi16 (__m512i __W, __mmask32 __U, __m512bh __A)
+_mm512_mask_ipcvttbf16_epi16 (__m512i __W, __mmask32 __U, __m512bh __A)
{
- return (__m512i) __builtin_ia32_cvttnebf162ibs512_mask ((__v32bf) __A,
- (__v32hi) __W,
- (__mmask32) __U);
+ return (__m512i) __builtin_ia32_cvttbf162ibs512_mask ((__v32bf) __A,
+ (__v32hi) __W,
+ (__mmask32) __U);
}
extern __inline __m512i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm512_maskz_ipcvttnebf16_epi16 (__mmask32 __U, __m512bh __A)
+_mm512_maskz_ipcvttbf16_epi16 (__mmask32 __U, __m512bh __A)
{
return
- (__m512i) __builtin_ia32_cvttnebf162ibs512_mask ((__v32bf) __A,
- (__v32hi)
- _mm512_setzero_si512 (),
- (__mmask32) __U);
+ (__m512i) __builtin_ia32_cvttbf162ibs512_mask ((__v32bf) __A,
+ (__v32hi)
+ _mm512_setzero_si512 (),
+ (__mmask32) __U);
}
extern __inline __m512i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm512_ipcvttnebf16_epu16 (__m512bh __A)
+_mm512_ipcvttbf16_epu16 (__m512bh __A)
{
return (__m512i)
- __builtin_ia32_cvttnebf162iubs512_mask ((__v32bf) __A,
- (__v32hi) _mm512_undefined_si512 (),
- (__mmask32) -1);
+ __builtin_ia32_cvttbf162iubs512_mask ((__v32bf) __A,
+ (__v32hi) _mm512_undefined_si512 (),
+ (__mmask32) -1);
}
extern __inline __m512i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm512_mask_ipcvttnebf16_epu16 (__m512i __W, __mmask32 __U, __m512bh __A)
+_mm512_mask_ipcvttbf16_epu16 (__m512i __W, __mmask32 __U, __m512bh __A)
{
- return (__m512i) __builtin_ia32_cvttnebf162iubs512_mask ((__v32bf) __A,
- (__v32hi) __W,
- (__mmask32)
- __U);
+ return (__m512i) __builtin_ia32_cvttbf162iubs512_mask ((__v32bf) __A,
+ (__v32hi) __W,
+ (__mmask32) __U);
}
extern __inline __m512i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm512_maskz_ipcvttnebf16_epu16 (__mmask32 __U, __m512bh __A)
+_mm512_maskz_ipcvttbf16_epu16 (__mmask32 __U, __m512bh __A)
{
return (__m512i)
- __builtin_ia32_cvttnebf162iubs512_mask ((__v32bf) __A,
- (__v32hi)
- _mm512_setzero_si512 (),
- (__mmask32) __U);
+ __builtin_ia32_cvttbf162iubs512_mask ((__v32bf) __A,
+ (__v32hi)
+ _mm512_setzero_si512 (),
+ (__mmask32) __U);
}
#ifdef __OPTIMIZE__
diff --git a/gcc/config/i386/avx10_2satcvtintrin.h
b/gcc/config/i386/avx10_2satcvtintrin.h
index 0b3b96f2691..ece1304bcfa 100644
--- a/gcc/config/i386/avx10_2satcvtintrin.h
+++ b/gcc/config/i386/avx10_2satcvtintrin.h
@@ -36,124 +36,124 @@
extern __inline __m128i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_ipcvtnebf16_epi16 (__m128bh __A)
+_mm_ipcvtbf16_epi16 (__m128bh __A)
{
- return (__m128i) __builtin_ia32_cvtnebf162ibs128_mask ((__v8bf) __A,
- (__v8hi)
- _mm_undefined_si128 (),
- (__mmask8) -1);
+ return (__m128i) __builtin_ia32_cvtbf162ibs128_mask ((__v8bf) __A,
+ (__v8hi)
+ _mm_undefined_si128 (),
+ (__mmask8) -1);
}
extern __inline __m128i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_mask_ipcvtnebf16_epi16 (__m128i __W, __mmask8 __U, __m128bh __A)
+_mm_mask_ipcvtbf16_epi16 (__m128i __W, __mmask8 __U, __m128bh __A)
{
- return (__m128i) __builtin_ia32_cvtnebf162ibs128_mask ((__v8bf) __A,
- (__v8hi) __W,
- (__mmask8) __U);
+ return (__m128i) __builtin_ia32_cvtbf162ibs128_mask ((__v8bf) __A,
+ (__v8hi) __W,
+ (__mmask8) __U);
}
extern __inline __m128i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_maskz_ipcvtnebf16_epi16 (__mmask8 __U, __m128bh __A)
+_mm_maskz_ipcvtbf16_epi16 (__mmask8 __U, __m128bh __A)
{
- return (__m128i) __builtin_ia32_cvtnebf162ibs128_mask ((__v8bf) __A,
- (__v8hi)
- _mm_setzero_si128 (),
- (__mmask8) __U);
+ return (__m128i) __builtin_ia32_cvtbf162ibs128_mask ((__v8bf) __A,
+ (__v8hi)
+ _mm_setzero_si128 (),
+ (__mmask8) __U);
}
extern __inline __m256i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_ipcvtnebf16_epi16 (__m256bh __A)
+_mm256_ipcvtbf16_epi16 (__m256bh __A)
{
return
- (__m256i) __builtin_ia32_cvtnebf162ibs256_mask ((__v16bf) __A,
- (__v16hi)
- _mm256_undefined_si256 (),
- (__mmask16) -1);
+ (__m256i) __builtin_ia32_cvtbf162ibs256_mask ((__v16bf) __A,
+ (__v16hi)
+ _mm256_undefined_si256 (),
+ (__mmask16) -1);
}
extern __inline __m256i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_ipcvtnebf16_epi16 (__m256i __W, __mmask16 __U, __m256bh __A)
+_mm256_mask_ipcvtbf16_epi16 (__m256i __W, __mmask16 __U, __m256bh __A)
{
- return (__m256i) __builtin_ia32_cvtnebf162ibs256_mask ((__v16bf) __A,
- (__v16hi) __W,
- (__mmask16) __U);
+ return (__m256i) __builtin_ia32_cvtbf162ibs256_mask ((__v16bf) __A,
+ (__v16hi) __W,
+ (__mmask16) __U);
}
extern __inline __m256i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_ipcvtnebf16_epi16 (__mmask16 __U, __m256bh __A)
+_mm256_maskz_ipcvtbf16_epi16 (__mmask16 __U, __m256bh __A)
{
return
- (__m256i) __builtin_ia32_cvtnebf162ibs256_mask ((__v16bf) __A,
- (__v16hi)
- _mm256_setzero_si256 (),
- (__mmask16) __U);
+ (__m256i) __builtin_ia32_cvtbf162ibs256_mask ((__v16bf) __A,
+ (__v16hi)
+ _mm256_setzero_si256 (),
+ (__mmask16) __U);
}
extern __inline __m128i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_ipcvtnebf16_epu16 (__m128bh __A)
+_mm_ipcvtbf16_epu16 (__m128bh __A)
{
return
- (__m128i) __builtin_ia32_cvtnebf162iubs128_mask ((__v8bf) __A,
- (__v8hi)
- _mm_undefined_si128 (),
- (__mmask8) -1);
+ (__m128i) __builtin_ia32_cvtbf162iubs128_mask ((__v8bf) __A,
+ (__v8hi)
+ _mm_undefined_si128 (),
+ (__mmask8) -1);
}
extern __inline __m128i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_mask_ipcvtnebf16_epu16 (__m128i __W, __mmask8 __U, __m128bh __A)
+_mm_mask_ipcvtbf16_epu16 (__m128i __W, __mmask8 __U, __m128bh __A)
{
- return (__m128i) __builtin_ia32_cvtnebf162iubs128_mask ((__v8bf) __A,
- (__v8hi) __W,
- (__mmask8) __U);
+ return (__m128i) __builtin_ia32_cvtbf162iubs128_mask ((__v8bf) __A,
+ (__v8hi) __W,
+ (__mmask8) __U);
}
extern __inline __m128i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_maskz_ipcvtnebf16_epu16 (__mmask8 __U, __m128bh __A)
+_mm_maskz_ipcvtbf16_epu16 (__mmask8 __U, __m128bh __A)
{
return
- (__m128i) __builtin_ia32_cvtnebf162iubs128_mask ((__v8bf) __A,
- (__v8hi)
- _mm_setzero_si128 (),
- (__mmask8) __U);
+ (__m128i) __builtin_ia32_cvtbf162iubs128_mask ((__v8bf) __A,
+ (__v8hi)
+ _mm_setzero_si128 (),
+ (__mmask8) __U);
}
extern __inline __m256i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_ipcvtnebf16_epu16 (__m256bh __A)
+_mm256_ipcvtbf16_epu16 (__m256bh __A)
{
return
- (__m256i) __builtin_ia32_cvtnebf162iubs256_mask ((__v16bf) __A,
- (__v16hi)
- _mm256_undefined_si256 (),
- (__mmask16) -1);
+ (__m256i) __builtin_ia32_cvtbf162iubs256_mask ((__v16bf) __A,
+ (__v16hi)
+ _mm256_undefined_si256 (),
+ (__mmask16) -1);
}
extern __inline __m256i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_ipcvtnebf16_epu16 (__m256i __W, __mmask16 __U, __m256bh __A)
+_mm256_mask_ipcvtbf16_epu16 (__m256i __W, __mmask16 __U, __m256bh __A)
{
- return (__m256i) __builtin_ia32_cvtnebf162iubs256_mask ((__v16bf) __A,
- (__v16hi) __W,
- (__mmask16) __U);
+ return (__m256i) __builtin_ia32_cvtbf162iubs256_mask ((__v16bf) __A,
+ (__v16hi) __W,
+ (__mmask16) __U);
}
extern __inline __m256i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_ipcvtnebf16_epu16 (__mmask16 __U, __m256bh __A)
+_mm256_maskz_ipcvtbf16_epu16 (__mmask16 __U, __m256bh __A)
{
return
- (__m256i) __builtin_ia32_cvtnebf162iubs256_mask ((__v16bf) __A,
- (__v16hi)
- _mm256_setzero_si256 (),
- (__mmask16) __U);
+ (__m256i) __builtin_ia32_cvtbf162iubs256_mask ((__v16bf) __A,
+ (__v16hi)
+ _mm256_setzero_si256 (),
+ (__mmask16) __U);
}
extern __inline __m128i
@@ -274,124 +274,120 @@ _mm_maskz_ipcvtps_epu32 (__mmask8 __U, __m128 __A)
extern __inline __m128i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_ipcvttnebf16_epi16 (__m128bh __A)
+_mm_ipcvttbf16_epi16 (__m128bh __A)
{
return
- (__m128i) __builtin_ia32_cvttnebf162ibs128_mask ((__v8bf) __A,
- (__v8hi)
- _mm_undefined_si128 (),
- (__mmask8) -1);
+ (__m128i) __builtin_ia32_cvttbf162ibs128_mask ((__v8bf) __A,
+ (__v8hi)
+ _mm_undefined_si128 (),
+ (__mmask8) -1);
}
extern __inline __m128i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_mask_ipcvttnebf16_epi16 (__m128i __W, __mmask8 __U, __m128bh __A)
+_mm_mask_ipcvttbf16_epi16 (__m128i __W, __mmask8 __U, __m128bh __A)
{
- return (__m128i) __builtin_ia32_cvttnebf162ibs128_mask ((__v8bf) __A,
- (__v8hi) __W,
- (__mmask8) __U);
+ return (__m128i) __builtin_ia32_cvttbf162ibs128_mask ((__v8bf) __A,
+ (__v8hi) __W,
+ (__mmask8) __U);
}
extern __inline __m128i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_maskz_ipcvttnebf16_epi16 (__mmask8 __U, __m128bh __A)
+_mm_maskz_ipcvttbf16_epi16 (__mmask8 __U, __m128bh __A)
{
- return (__m128i) __builtin_ia32_cvttnebf162ibs128_mask ((__v8bf) __A,
- (__v8hi)
- _mm_setzero_si128 (),
- (__mmask8) __U);
+ return (__m128i) __builtin_ia32_cvttbf162ibs128_mask ((__v8bf) __A,
+ (__v8hi)
+ _mm_setzero_si128 (),
+ (__mmask8) __U);
}
extern __inline __m128i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_ipcvttnebf16_epu16 (__m128bh __A)
+_mm_ipcvttbf16_epu16 (__m128bh __A)
{
return
- (__m128i) __builtin_ia32_cvttnebf162iubs128_mask ((__v8bf) __A,
- (__v8hi)
- _mm_undefined_si128 (),
- (__mmask8) -1);
+ (__m128i) __builtin_ia32_cvttbf162iubs128_mask ((__v8bf) __A,
+ (__v8hi)
+ _mm_undefined_si128 (),
+ (__mmask8) -1);
}
extern __inline __m128i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_mask_ipcvttnebf16_epu16 (__m128i __W, __mmask8 __U, __m128bh __A)
+_mm_mask_ipcvttbf16_epu16 (__m128i __W, __mmask8 __U, __m128bh __A)
{
- return (__m128i) __builtin_ia32_cvttnebf162iubs128_mask ((__v8bf) __A,
- (__v8hi) __W,
- (__mmask8) __U);
+ return (__m128i) __builtin_ia32_cvttbf162iubs128_mask ((__v8bf) __A,
+ (__v8hi) __W,
+ (__mmask8) __U);
}
extern __inline __m128i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_maskz_ipcvttnebf16_epu16 (__mmask8 __U, __m128bh __A)
+_mm_maskz_ipcvttbf16_epu16 (__mmask8 __U, __m128bh __A)
{
- return (__m128i) __builtin_ia32_cvttnebf162iubs128_mask ((__v8bf) __A,
- (__v8hi)
- _mm_setzero_si128 (),
- (__mmask8) __U);
+ return (__m128i) __builtin_ia32_cvttbf162iubs128_mask ((__v8bf) __A,
+ (__v8hi)
+ _mm_setzero_si128 (),
+ (__mmask8) __U);
}
extern __inline __m256i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_ipcvttnebf16_epi16 (__m256bh __A)
+_mm256_ipcvttbf16_epi16 (__m256bh __A)
{
return (__m256i)
- __builtin_ia32_cvttnebf162ibs256_mask ((__v16bf) __A,
- (__v16hi)
- _mm256_undefined_si256 (),
- (__mmask16) -1);
+ __builtin_ia32_cvttbf162ibs256_mask ((__v16bf) __A,
+ (__v16hi) _mm256_undefined_si256 (),
+ (__mmask16) -1);
}
extern __inline __m256i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_ipcvttnebf16_epi16 (__m256i __W, __mmask16 __U, __m256bh __A)
+_mm256_mask_ipcvttbf16_epi16 (__m256i __W, __mmask16 __U, __m256bh __A)
{
- return (__m256i) __builtin_ia32_cvttnebf162ibs256_mask ((__v16bf) __A,
- (__v16hi) __W,
- (__mmask16) __U);
+ return (__m256i) __builtin_ia32_cvttbf162ibs256_mask ((__v16bf) __A,
+ (__v16hi) __W,
+ (__mmask16) __U);
}
extern __inline __m256i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_ipcvttnebf16_epi16 (__mmask16 __U, __m256bh __A)
+_mm256_maskz_ipcvttbf16_epi16 (__mmask16 __U, __m256bh __A)
{
return (__m256i)
- __builtin_ia32_cvttnebf162ibs256_mask ((__v16bf) __A,
- (__v16hi)
- _mm256_setzero_si256 (),
- (__mmask16) __U);
+ __builtin_ia32_cvttbf162ibs256_mask ((__v16bf) __A,
+ (__v16hi) _mm256_setzero_si256 (),
+ (__mmask16) __U);
}
extern __inline __m256i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_ipcvttnebf16_epu16 (__m256bh __A)
+_mm256_ipcvttbf16_epu16 (__m256bh __A)
{
return (__m256i)
- __builtin_ia32_cvttnebf162iubs256_mask ((__v16bf) __A,
- (__v16hi)
- _mm256_undefined_si256 (),
- (__mmask16) -1);
+ __builtin_ia32_cvttbf162iubs256_mask ((__v16bf) __A,
+ (__v16hi) _mm256_undefined_si256 (),
+ (__mmask16) -1);
}
extern __inline __m256i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_ipcvttnebf16_epu16 (__m256i __W, __mmask16 __U, __m256bh __A)
+_mm256_mask_ipcvttbf16_epu16 (__m256i __W, __mmask16 __U, __m256bh __A)
{
- return (__m256i) __builtin_ia32_cvttnebf162iubs256_mask ((__v16bf) __A,
- (__v16hi) __W,
- (__mmask16) __U);
+ return (__m256i) __builtin_ia32_cvttbf162iubs256_mask ((__v16bf) __A,
+ (__v16hi) __W,
+ (__mmask16) __U);
}
extern __inline __m256i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_ipcvttnebf16_epu16 (__mmask16 __U, __m256bh __A)
+_mm256_maskz_ipcvttbf16_epu16 (__mmask16 __U, __m256bh __A)
{
return (__m256i)
- __builtin_ia32_cvttnebf162iubs256_mask ((__v16bf) __A,
- (__v16hi)
- _mm256_setzero_si256 (),
- (__mmask16) __U);
+ __builtin_ia32_cvttbf162iubs256_mask ((__v16bf) __A,
+ (__v16hi) _mm256_setzero_si256 (),
+ (__mmask16) __U);
}
extern __inline __m128i
@@ -1424,51 +1420,6 @@ _mm_cvtts_roundss_epu32 (__m128 __A, const int __R)
(__mmask8) (U), \
(R)))
-
-#define _mm256_ipcvttne_roundbf16_epi16(A, R) \
- ((__m256i) \
- __builtin_ia32_cvttnebf162ibs256_mask_round ((__v16bf) (A), \
- (__v16hi) \
- (_mm256_undefined_si256 ()), \
- (__mmask16) (-1), \
- (R)))
-
-#define _mm256_mask_ipcvttne_roundbf16_epi16(W, U, A, R) \
- ((__m256i) __builtin_ia32_cvttnebf162ibs256_mask_round ((__v16bf) (A), \
- (__v16hi) (W), \
- (__mmask16) (U), \
- (R)))
-
-#define _mm256_maskz_ipcvttne_roundbf16_epi16(U, A, R) \
- ((__m256i) \
- __builtin_ia32_cvttnebf162ibs256_mask_round ((__v16bf) (A), \
- (__v16hi) \
- (_mm256_setzero_si256 ()), \
- (__mmask16) (U), \
- (R)))
-
-#define _mm256_ipcvttne_roundbf16_epu16(A, R) \
- ((__m256i) \
- __builtin_ia32_cvttnebf162iubs256_mask_round ((__v16bf) (A), \
- (__v16hi) \
- (_mm256_undefined_si256 ()), \
- (__mmask16) (-1), \
- (R)))
-
-#define _mm256_mask_ipcvttne_roundbf16_epu16(W, U, A, R) \
- ((__m256i) __builtin_ia32_cvttnebf162iubs256_mask_round ((__v16bf) (A), \
- (__v16hi) (W), \
- (__mmask16) (U), \
- (R)))
-
-#define _mm256_maskz_ipcvttne_roundbf16_epu16(U, A, R) \
- ((__m256i) \
- __builtin_ia32_cvttnebf162iubs256_mask_round ((__v16bf) (A), \
- (__v16hi) \
- (_mm256_setzero_si256 ()), \
- (__mmask16) (U), \
- (R)))
-
#define _mm256_ipcvtt_roundph_epi16(A, R) \
((__m256i) \
__builtin_ia32_cvttph2ibs256_mask_round ((__v16hf) (A), \
diff --git a/gcc/config/i386/i386-builtin.def b/gcc/config/i386/i386-builtin.def
index 5880f42c1c7..7582b4d91da 100644
--- a/gcc/config/i386/i386-builtin.def
+++ b/gcc/config/i386/i386-builtin.def
@@ -3290,22 +3290,22 @@ BDESC (0, OPTION_MASK_ISA2_AVX10_2_256,
CODE_FOR_avx10_2_comisbf16_v8bf, "__buil
BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx10_2_comisbf16_v8bf,
"__builtin_ia32_vcomisbf16le", IX86_BUILTIN_VCOMISBF16LE, LE, (int)
INT_FTYPE_V8BF_V8BF)
BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx10_2_comisbf16_v8bf,
"__builtin_ia32_vcomisbf16lt", IX86_BUILTIN_VCOMISBF16LT, LT, (int)
INT_FTYPE_V8BF_V8BF)
BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx10_2_comisbf16_v8bf,
"__builtin_ia32_vcomisbf16neq", IX86_BUILTIN_VCOMISBF16NE, NE, (int)
INT_FTYPE_V8BF_V8BF)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256,
CODE_FOR_avx10_2_cvtnebf162ibsv8bf_mask,
"__builtin_ia32_cvtnebf162ibs128_mask", IX86_BUILTIN_CVTNEBF162IBS128_MASK,
UNKNOWN, (int) V8HI_FTYPE_V8BF_V8HI_UQI)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256,
CODE_FOR_avx10_2_cvtnebf162ibsv16bf_mask,
"__builtin_ia32_cvtnebf162ibs256_mask", IX86_BUILTIN_CVTNEBF162IBS256_MASK,
UNKNOWN, (int) V16HI_FTYPE_V16BF_V16HI_UHI)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_512,
CODE_FOR_avx10_2_cvtnebf162ibsv32bf_mask,
"__builtin_ia32_cvtnebf162ibs512_mask", IX86_BUILTIN_CVTNEBF162IBS512_MASK,
UNKNOWN, (int) V32HI_FTYPE_V32BF_V32HI_USI)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256,
CODE_FOR_avx10_2_cvtnebf162iubsv8bf_mask,
"__builtin_ia32_cvtnebf162iubs128_mask", IX86_BUILTIN_CVTNEBF162IUBS128_MASK,
UNKNOWN, (int) V8HI_FTYPE_V8BF_V8HI_UQI)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256,
CODE_FOR_avx10_2_cvtnebf162iubsv16bf_mask,
"__builtin_ia32_cvtnebf162iubs256_mask", IX86_BUILTIN_CVTNEBF162IUBS256_MASK,
UNKNOWN, (int) V16HI_FTYPE_V16BF_V16HI_UHI)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_512,
CODE_FOR_avx10_2_cvtnebf162iubsv32bf_mask,
"__builtin_ia32_cvtnebf162iubs512_mask", IX86_BUILTIN_CVTNEBF162IUBS512_MASK,
UNKNOWN, (int) V32HI_FTYPE_V32BF_V32HI_USI)
+BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx10_2_cvtbf162ibsv8bf_mask,
"__builtin_ia32_cvtbf162ibs128_mask", IX86_BUILTIN_CVTBF162IBS128_MASK,
UNKNOWN, (int) V8HI_FTYPE_V8BF_V8HI_UQI)
+BDESC (0, OPTION_MASK_ISA2_AVX10_2_256,
CODE_FOR_avx10_2_cvtbf162ibsv16bf_mask, "__builtin_ia32_cvtbf162ibs256_mask",
IX86_BUILTIN_CVTBF162IBS256_MASK, UNKNOWN, (int) V16HI_FTYPE_V16BF_V16HI_UHI)
+BDESC (0, OPTION_MASK_ISA2_AVX10_2_512,
CODE_FOR_avx10_2_cvtbf162ibsv32bf_mask, "__builtin_ia32_cvtbf162ibs512_mask",
IX86_BUILTIN_CVTBF162IBS512_MASK, UNKNOWN, (int) V32HI_FTYPE_V32BF_V32HI_USI)
+BDESC (0, OPTION_MASK_ISA2_AVX10_2_256,
CODE_FOR_avx10_2_cvtbf162iubsv8bf_mask, "__builtin_ia32_cvtbf162iubs128_mask",
IX86_BUILTIN_CVTBF162IUBS128_MASK, UNKNOWN, (int) V8HI_FTYPE_V8BF_V8HI_UQI)
+BDESC (0, OPTION_MASK_ISA2_AVX10_2_256,
CODE_FOR_avx10_2_cvtbf162iubsv16bf_mask, "__builtin_ia32_cvtbf162iubs256_mask",
IX86_BUILTIN_CVTBF162IUBS256_MASK, UNKNOWN, (int) V16HI_FTYPE_V16BF_V16HI_UHI)
+BDESC (0, OPTION_MASK_ISA2_AVX10_2_512,
CODE_FOR_avx10_2_cvtbf162iubsv32bf_mask, "__builtin_ia32_cvtbf162iubs512_mask",
IX86_BUILTIN_CVTBF162IUBS512_MASK, UNKNOWN, (int) V32HI_FTYPE_V32BF_V32HI_USI)
BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx10_2_cvtph2ibsv8hf_mask,
"__builtin_ia32_cvtph2ibs128_mask", IX86_BUILTIN_CVTPH2IBS128_MASK, UNKNOWN,
(int) V8HI_FTYPE_V8HF_V8HI_UQI)
BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx10_2_cvtph2iubsv8hf_mask,
"__builtin_ia32_cvtph2iubs128_mask", IX86_BUILTIN_CVTPH2IUBS128_MASK, UNKNOWN,
(int) V8HI_FTYPE_V8HF_V8HI_UQI)
BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx10_2_cvtps2ibsv4sf_mask,
"__builtin_ia32_cvtps2ibs128_mask", IX86_BUILTIN_CVTPS2IBS128_MASK, UNKNOWN,
(int) V4SI_FTYPE_V4SF_V4SI_UQI)
BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx10_2_cvtps2iubsv4sf_mask,
"__builtin_ia32_cvtps2iubs128_mask", IX86_BUILTIN_CVTPS2IUBS128_MASK, UNKNOWN,
(int) V4SI_FTYPE_V4SF_V4SI_UQI)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256,
CODE_FOR_avx10_2_cvttnebf162ibsv8bf_mask,
"__builtin_ia32_cvttnebf162ibs128_mask", IX86_BUILTIN_CVTTNEBF162IBS128_MASK,
UNKNOWN, (int) V8HI_FTYPE_V8BF_V8HI_UQI)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256,
CODE_FOR_avx10_2_cvttnebf162ibsv16bf_mask,
"__builtin_ia32_cvttnebf162ibs256_mask", IX86_BUILTIN_CVTTNEBF162IBS256_MASK,
UNKNOWN, (int) V16HI_FTYPE_V16BF_V16HI_UHI)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_512,
CODE_FOR_avx10_2_cvttnebf162ibsv32bf_mask,
"__builtin_ia32_cvttnebf162ibs512_mask", IX86_BUILTIN_CVTTNEBF162IBS512_MASK,
UNKNOWN, (int) V32HI_FTYPE_V32BF_V32HI_USI)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256,
CODE_FOR_avx10_2_cvttnebf162iubsv8bf_mask,
"__builtin_ia32_cvttnebf162iubs128_mask", IX86_BUILTIN_CVTTNEBF162IUBS128_MASK,
UNKNOWN, (int) V8HI_FTYPE_V8BF_V8HI_UQI)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256,
CODE_FOR_avx10_2_cvttnebf162iubsv16bf_mask,
"__builtin_ia32_cvttnebf162iubs256_mask", IX86_BUILTIN_CVTTNEBF162IUBS256_MASK,
UNKNOWN, (int) V16HI_FTYPE_V16BF_V16HI_UHI)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_512,
CODE_FOR_avx10_2_cvttnebf162iubsv32bf_mask,
"__builtin_ia32_cvttnebf162iubs512_mask", IX86_BUILTIN_CVTTNEBF162IUBS512_MASK,
UNKNOWN, (int) V32HI_FTYPE_V32BF_V32HI_USI)
+BDESC (0, OPTION_MASK_ISA2_AVX10_2_256,
CODE_FOR_avx10_2_cvttbf162ibsv8bf_mask, "__builtin_ia32_cvttbf162ibs128_mask",
IX86_BUILTIN_CVTTBF162IBS128_MASK, UNKNOWN, (int) V8HI_FTYPE_V8BF_V8HI_UQI)
+BDESC (0, OPTION_MASK_ISA2_AVX10_2_256,
CODE_FOR_avx10_2_cvttbf162ibsv16bf_mask, "__builtin_ia32_cvttbf162ibs256_mask",
IX86_BUILTIN_CVTTBF162IBS256_MASK, UNKNOWN, (int) V16HI_FTYPE_V16BF_V16HI_UHI)
+BDESC (0, OPTION_MASK_ISA2_AVX10_2_512,
CODE_FOR_avx10_2_cvttbf162ibsv32bf_mask, "__builtin_ia32_cvttbf162ibs512_mask",
IX86_BUILTIN_CVTTBF162IBS512_MASK, UNKNOWN, (int) V32HI_FTYPE_V32BF_V32HI_USI)
+BDESC (0, OPTION_MASK_ISA2_AVX10_2_256,
CODE_FOR_avx10_2_cvttbf162iubsv8bf_mask,
"__builtin_ia32_cvttbf162iubs128_mask", IX86_BUILTIN_CVTTBF162IUBS128_MASK,
UNKNOWN, (int) V8HI_FTYPE_V8BF_V8HI_UQI)
+BDESC (0, OPTION_MASK_ISA2_AVX10_2_256,
CODE_FOR_avx10_2_cvttbf162iubsv16bf_mask,
"__builtin_ia32_cvttbf162iubs256_mask", IX86_BUILTIN_CVTTBF162IUBS256_MASK,
UNKNOWN, (int) V16HI_FTYPE_V16BF_V16HI_UHI)
+BDESC (0, OPTION_MASK_ISA2_AVX10_2_512,
CODE_FOR_avx10_2_cvttbf162iubsv32bf_mask,
"__builtin_ia32_cvttbf162iubs512_mask", IX86_BUILTIN_CVTTBF162IUBS512_MASK,
UNKNOWN, (int) V32HI_FTYPE_V32BF_V32HI_USI)
BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx10_2_cvttph2ibsv8hf_mask,
"__builtin_ia32_cvttph2ibs128_mask", IX86_BUILTIN_CVTTPH2IBS128_MASK, UNKNOWN,
(int) V8HI_FTYPE_V8HF_V8HI_UQI)
BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx10_2_cvttph2iubsv8hf_mask,
"__builtin_ia32_cvttph2iubs128_mask", IX86_BUILTIN_CVTTPH2IUBS128_MASK,
UNKNOWN, (int) V8HI_FTYPE_V8HF_V8HI_UQI)
BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx10_2_cvttps2ibsv4sf_mask,
"__builtin_ia32_cvttps2ibs128_mask", IX86_BUILTIN_CVTTPS2IBS128_MASK, UNKNOWN,
(int) V4SI_FTYPE_V4SF_V4SI_UQI)
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 74fc14138f0..9c495ffa40c 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -234,14 +234,14 @@
UNSPEC_VREDUCEBF16
UNSPEC_VGETMANTBF16
UNSPEC_VFPCLASSBF16
- UNSPEC_VCVTNEBF162IBS
- UNSPEC_VCVTNEBF162IUBS
+ UNSPEC_VCVTBF162IBS
+ UNSPEC_VCVTBF162IUBS
UNSPEC_VCVTPH2IBS
UNSPEC_VCVTPH2IUBS
UNSPEC_VCVTPS2IBS
UNSPEC_VCVTPS2IUBS
- UNSPEC_VCVTTNEBF162IBS
- UNSPEC_VCVTTNEBF162IUBS
+ UNSPEC_VCVTTBF162IBS
+ UNSPEC_VCVTTBF162IUBS
UNSPEC_VCVTTPH2IBS
UNSPEC_VCVTTPH2IUBS
UNSPEC_VCVTTPS2IBS
@@ -32460,17 +32460,17 @@
"vcmpbf16\t{%3, %2, %1,
%0<mask_scalar_merge_operand4>|%0<mask_scalar_merge_operand4>, %1, %2, %3}"
[(set_attr "prefix" "evex")])
-(define_int_iterator UNSPEC_CVTNE_BF16_IBS_ITER
- [UNSPEC_VCVTNEBF162IBS
- UNSPEC_VCVTNEBF162IUBS
- UNSPEC_VCVTTNEBF162IBS
- UNSPEC_VCVTTNEBF162IUBS])
+(define_int_iterator UNSPEC_CVT_BF16_IBS_ITER
+ [UNSPEC_VCVTBF162IBS
+ UNSPEC_VCVTBF162IUBS
+ UNSPEC_VCVTTBF162IBS
+ UNSPEC_VCVTTBF162IUBS])
(define_int_attr sat_cvt_sign_prefix
- [(UNSPEC_VCVTNEBF162IBS "")
- (UNSPEC_VCVTNEBF162IUBS "u")
- (UNSPEC_VCVTTNEBF162IBS "")
- (UNSPEC_VCVTTNEBF162IUBS "u")
+ [(UNSPEC_VCVTBF162IBS "")
+ (UNSPEC_VCVTBF162IUBS "u")
+ (UNSPEC_VCVTTBF162IBS "")
+ (UNSPEC_VCVTTBF162IUBS "u")
(UNSPEC_VCVTPH2IBS "")
(UNSPEC_VCVTPH2IUBS "u")
(UNSPEC_VCVTTPH2IBS "")
@@ -32483,18 +32483,18 @@
(UNSPEC_UFIX_SATURATION "u")])
(define_int_attr sat_cvt_trunc_prefix
- [(UNSPEC_VCVTNEBF162IBS "")
- (UNSPEC_VCVTNEBF162IUBS "")
- (UNSPEC_VCVTTNEBF162IBS "t")
- (UNSPEC_VCVTTNEBF162IUBS "t")])
+ [(UNSPEC_VCVTBF162IBS "")
+ (UNSPEC_VCVTBF162IUBS "")
+ (UNSPEC_VCVTTBF162IBS "t")
+ (UNSPEC_VCVTTBF162IUBS "t")])
-(define_insn
"avx10_2_cvt<sat_cvt_trunc_prefix>nebf162i<sat_cvt_sign_prefix>bs<mode><mask_name>"
+(define_insn
"avx10_2_cvt<sat_cvt_trunc_prefix>bf162i<sat_cvt_sign_prefix>bs<mode><mask_name>"
[(set (match_operand:<sseintvecmode> 0 "register_operand" "=v")
(unspec:<sseintvecmode>
[(match_operand:VBF_AVX10_2 1 "vector_operand" "vm")]
- UNSPEC_CVTNE_BF16_IBS_ITER))]
+ UNSPEC_CVT_BF16_IBS_ITER))]
"TARGET_AVX10_2_256"
- "vcvt<sat_cvt_trunc_prefix>nebf162i<sat_cvt_sign_prefix>bs\t{%1,
%0<mask_operand2>|%0<mask_operand2>, %1}"
+ "vcvt<sat_cvt_trunc_prefix>bf162i<sat_cvt_sign_prefix>bs\t{%1,
%0<mask_operand2>|%0<mask_operand2>, %1}"
[(set_attr "type" "ssecvt")
(set_attr "prefix" "evex")
(set_attr "mode" "<sseinsnmode>")])
diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-satcvt-1.c
b/gcc/testsuite/gcc.target/i386/avx10_2-512-satcvt-1.c
index bb90798b219..341d258d24a 100644
--- a/gcc/testsuite/gcc.target/i386/avx10_2-512-satcvt-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-satcvt-1.c
@@ -24,18 +24,18 @@
/* { dg-final { scan-assembler-times "vcvttps2iubs\[
\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vcvttps2iubs\[
\\t\]+\{sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vcvttps2iubs\[
\\t\]+\{sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvtnebf162ibs\[
\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvtnebf162ibs\[
\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvtnebf162ibs\[
\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvtnebf162iubs\[
\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvtnebf162iubs\[
\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvtnebf162iubs\[
\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvttnebf162ibs\[
\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvttnebf162ibs\[
\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvttnebf162ibs\[
\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvttnebf162iubs\[
\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvttnebf162iubs\[
\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvttnebf162iubs\[
\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtbf162ibs\[
\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtbf162ibs\[
\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtbf162ibs\[
\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtbf162iubs\[
\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtbf162iubs\[
\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtbf162iubs\[
\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvttbf162ibs\[
\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvttbf162ibs\[
\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvttbf162ibs\[
\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvttbf162iubs\[
\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvttbf162iubs\[
\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvttbf162iubs\[
\\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vcvttpd2dqs\[
\\t\]+\{sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 }
} */
/* { dg-final { scan-assembler-times "vcvttpd2dqs\[
\\t\]+\{sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[
\\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vcvttpd2dqs\[
\\t\]+\{sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}(?:\n|\[
\\t\]+#)" 1 } } */
@@ -109,21 +109,21 @@ avx10_2_test (void)
xi = _mm512_mask_ipcvtt_roundps_epu32 (xi, m16, x, 8);
xi = _mm512_maskz_ipcvtt_roundps_epu32 (m16, x, 8);
- xi = _mm512_ipcvtnebf16_epi16 (xbh);
- xi = _mm512_mask_ipcvtnebf16_epi16 (xi, m32, xbh);
- xi = _mm512_maskz_ipcvtnebf16_epi16 (m32, xbh);
+ xi = _mm512_ipcvtbf16_epi16 (xbh);
+ xi = _mm512_mask_ipcvtbf16_epi16 (xi, m32, xbh);
+ xi = _mm512_maskz_ipcvtbf16_epi16 (m32, xbh);
- xi = _mm512_ipcvtnebf16_epu16 (xbh);
- xi = _mm512_mask_ipcvtnebf16_epu16 (xi, m32, xbh);
- xi = _mm512_maskz_ipcvtnebf16_epu16 (m32, xbh);
+ xi = _mm512_ipcvtbf16_epu16 (xbh);
+ xi = _mm512_mask_ipcvtbf16_epu16 (xi, m32, xbh);
+ xi = _mm512_maskz_ipcvtbf16_epu16 (m32, xbh);
- xi = _mm512_ipcvttnebf16_epi16 (xbh);
- xi = _mm512_mask_ipcvttnebf16_epi16 (xi, m32, xbh);
- xi = _mm512_maskz_ipcvttnebf16_epi16 (m32, xbh);
+ xi = _mm512_ipcvttbf16_epi16 (xbh);
+ xi = _mm512_mask_ipcvttbf16_epi16 (xi, m32, xbh);
+ xi = _mm512_maskz_ipcvttbf16_epi16 (m32, xbh);
- xi = _mm512_ipcvttnebf16_epu16 (xbh);
- xi = _mm512_mask_ipcvttnebf16_epu16 (xi, m32, xbh);
- xi = _mm512_maskz_ipcvttnebf16_epu16 (m32, xbh);
+ xi = _mm512_ipcvttbf16_epu16 (xbh);
+ xi = _mm512_mask_ipcvttbf16_epu16 (xi, m32, xbh);
+ xi = _mm512_maskz_ipcvttbf16_epu16 (m32, xbh);
hxi = _mm512_cvtts_roundpd_epi32 (xd, 8);
hxi = _mm512_mask_cvtts_roundpd_epi32 (hxi, m8, xd, 8);
diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtnebf162ibs-2.c
b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbf162ibs-2.c
similarity index 87%
rename from gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtnebf162ibs-2.c
rename to gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbf162ibs-2.c
index 3321a8ff0f8..73c67226394 100644
--- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtnebf162ibs-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbf162ibs-2.c
@@ -50,9 +50,9 @@ TEST (void)
for (i = 0; i < SIZE; i++)
res2.a[i] = DEFAULT_VALUE;
- res1.x = INTRINSIC (_ipcvtnebf16_epi16) (s.x);
- res2.x = INTRINSIC (_mask_ipcvtnebf16_epi16) (res2.x, mask, s.x);
- res3.x = INTRINSIC (_maskz_ipcvtnebf16_epi16) (mask, s.x);
+ res1.x = INTRINSIC (_ipcvtbf16_epi16) (s.x);
+ res2.x = INTRINSIC (_mask_ipcvtbf16_epi16) (res2.x, mask, s.x);
+ res3.x = INTRINSIC (_maskz_ipcvtbf16_epi16) (mask, s.x);
CALC (s.a, res_ref);
diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtnebf162iubs-2.c
b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbf162iubs-2.c
similarity index 88%
rename from gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtnebf162iubs-2.c
rename to gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbf162iubs-2.c
index 1e95ec949e1..59ed049dba6 100644
--- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtnebf162iubs-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbf162iubs-2.c
@@ -50,9 +50,9 @@ TEST (void)
for (i = 0; i < SIZE; i++)
res2.a[i] = DEFAULT_VALUE;
- res1.x = INTRINSIC (_ipcvtnebf16_epu16) (s.x);
- res2.x = INTRINSIC (_mask_ipcvtnebf16_epu16) (res2.x, mask, s.x);
- res3.x = INTRINSIC (_maskz_ipcvtnebf16_epu16) (mask, s.x);
+ res1.x = INTRINSIC (_ipcvtbf16_epu16) (s.x);
+ res2.x = INTRINSIC (_mask_ipcvtbf16_epu16) (res2.x, mask, s.x);
+ res3.x = INTRINSIC (_maskz_ipcvtbf16_epu16) (mask, s.x);
CALC (s.a, res_ref);
diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttnebf162ibs-2.c
b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttbf162ibs-2.c
similarity index 87%
rename from gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttnebf162ibs-2.c
rename to gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttbf162ibs-2.c
index 44504128525..47688f5c270 100644
--- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttnebf162ibs-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttbf162ibs-2.c
@@ -50,9 +50,9 @@ TEST (void)
for (i = 0; i < SIZE; i++)
res2.a[i] = DEFAULT_VALUE;
- res1.x = INTRINSIC (_ipcvttnebf16_epi16) (s.x);
- res2.x = INTRINSIC (_mask_ipcvttnebf16_epi16) (res2.x, mask, s.x);
- res3.x = INTRINSIC (_maskz_ipcvttnebf16_epi16) (mask, s.x);
+ res1.x = INTRINSIC (_ipcvttbf16_epi16) (s.x);
+ res2.x = INTRINSIC (_mask_ipcvttbf16_epi16) (res2.x, mask, s.x);
+ res3.x = INTRINSIC (_maskz_ipcvttbf16_epi16) (mask, s.x);
CALC (s.a, res_ref);
diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttnebf162iubs-2.c
b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttbf162iubs-2.c
similarity index 87%
rename from gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttnebf162iubs-2.c
rename to gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttbf162iubs-2.c
index 51a9e52668c..97cb11b04b9 100644
--- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttnebf162iubs-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttbf162iubs-2.c
@@ -50,9 +50,9 @@ TEST (void)
for (i = 0; i < SIZE; i++)
res2.a[i] = DEFAULT_VALUE;
- res1.x = INTRINSIC (_ipcvttnebf16_epu16) (s.x);
- res2.x = INTRINSIC (_mask_ipcvttnebf16_epu16) (res2.x, mask, s.x);
- res3.x = INTRINSIC (_maskz_ipcvttnebf16_epu16) (mask, s.x);
+ res1.x = INTRINSIC (_ipcvttbf16_epu16) (s.x);
+ res2.x = INTRINSIC (_mask_ipcvttbf16_epu16) (res2.x, mask, s.x);
+ res3.x = INTRINSIC (_maskz_ipcvttbf16_epu16) (mask, s.x);
CALC (s.a, res_ref);
diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-satcvt-1.c
b/gcc/testsuite/gcc.target/i386/avx10_2-satcvt-1.c
index 5ebd6718ff9..7231c2a0820 100644
--- a/gcc/testsuite/gcc.target/i386/avx10_2-satcvt-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx10_2-satcvt-1.c
@@ -24,18 +24,18 @@
/* { dg-final { scan-assembler-times "vcvttps2iubs\[
\\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vcvttps2iubs\[
\\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vcvttps2iubs\[
\\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvtnebf162ibs\[
\\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvtnebf162ibs\[
\\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvtnebf162ibs\[
\\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvtnebf162iubs\[
\\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvtnebf162iubs\[
\\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvtnebf162iubs\[
\\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvttnebf162ibs\[
\\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvttnebf162ibs\[
\\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvttnebf162ibs\[
\\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvttnebf162iubs\[
\\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvttnebf162iubs\[
\\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvttnebf162iubs\[
\\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtbf162ibs\[
\\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtbf162ibs\[
\\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtbf162ibs\[
\\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtbf162iubs\[
\\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtbf162iubs\[
\\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtbf162iubs\[
\\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvttbf162ibs\[
\\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvttbf162ibs\[
\\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvttbf162ibs\[
\\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvttbf162iubs\[
\\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvttbf162iubs\[
\\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvttbf162iubs\[
\\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vcvtph2ibs\[
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vcvtph2ibs\[
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vcvtph2ibs\[
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
@@ -60,18 +60,18 @@
/* { dg-final { scan-assembler-times "vcvttps2iubs\[
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vcvttps2iubs\[
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vcvttps2iubs\[
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvtnebf162ibs\[
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvtnebf162ibs\[
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvtnebf162ibs\[
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvtnebf162iubs\[
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvtnebf162iubs\[
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvtnebf162iubs\[
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvttnebf162ibs\[
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvttnebf162ibs\[
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvttnebf162ibs\[
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvttnebf162iubs\[
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvttnebf162iubs\[
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vcvttnebf162iubs\[
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtbf162ibs\[
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtbf162ibs\[
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtbf162ibs\[
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtbf162iubs\[
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtbf162iubs\[
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtbf162iubs\[
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvttbf162ibs\[
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvttbf162ibs\[
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvttbf162ibs\[
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvttbf162iubs\[
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvttbf162iubs\[
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvttbf162iubs\[
\\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[
\\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vcvttpd2dqsy\[
\\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 }
} */
/* { dg-final { scan-assembler-times "vcvttpd2dqsy\[
\\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[
\\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vcvttpd2dqsy\[
\\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}(?:\n|\[
\\t\]+#)" 1 } } */
@@ -183,21 +183,21 @@ avx10_2_test (void)
xi = _mm256_mask_ipcvtt_roundps_epu32 (xi, m8, x, 8);
xi = _mm256_maskz_ipcvtt_roundps_epu32 (m8, x, 8);
- xi = _mm256_ipcvtnebf16_epi16 (xbh);
- xi = _mm256_mask_ipcvtnebf16_epi16 (xi, m16, xbh);
- xi = _mm256_maskz_ipcvtnebf16_epi16 (m16, xbh);
+ xi = _mm256_ipcvtbf16_epi16 (xbh);
+ xi = _mm256_mask_ipcvtbf16_epi16 (xi, m16, xbh);
+ xi = _mm256_maskz_ipcvtbf16_epi16 (m16, xbh);
- xi = _mm256_ipcvtnebf16_epu16 (xbh);
- xi = _mm256_mask_ipcvtnebf16_epu16 (xi, m16, xbh);
- xi = _mm256_maskz_ipcvtnebf16_epu16 (m16, xbh);
+ xi = _mm256_ipcvtbf16_epu16 (xbh);
+ xi = _mm256_mask_ipcvtbf16_epu16 (xi, m16, xbh);
+ xi = _mm256_maskz_ipcvtbf16_epu16 (m16, xbh);
- xi = _mm256_ipcvttnebf16_epi16 (xbh);
- xi = _mm256_mask_ipcvttnebf16_epi16 (xi, m16, xbh);
- xi = _mm256_maskz_ipcvttnebf16_epi16 (m16, xbh);
+ xi = _mm256_ipcvttbf16_epi16 (xbh);
+ xi = _mm256_mask_ipcvttbf16_epi16 (xi, m16, xbh);
+ xi = _mm256_maskz_ipcvttbf16_epi16 (m16, xbh);
- xi = _mm256_ipcvttnebf16_epu16 (xbh);
- xi = _mm256_mask_ipcvttnebf16_epu16 (xi, m16, xbh);
- xi = _mm256_maskz_ipcvttnebf16_epu16 (m16, xbh);
+ xi = _mm256_ipcvttbf16_epu16 (xbh);
+ xi = _mm256_mask_ipcvttbf16_epu16 (xi, m16, xbh);
+ xi = _mm256_maskz_ipcvttbf16_epu16 (m16, xbh);
hxi = _mm_ipcvtph_epi16 (hxh);
hxi = _mm_mask_ipcvtph_epi16 (hxi, m8, hxh);
@@ -231,21 +231,21 @@ avx10_2_test (void)
hxi = _mm_mask_ipcvttps_epu32 (hxi, m8, hx);
hxi = _mm_maskz_ipcvttps_epu32 (m8, hx);
- hxi = _mm_ipcvtnebf16_epi16 (hxbh);
- hxi = _mm_mask_ipcvtnebf16_epi16 (hxi, m8, hxbh);
- hxi = _mm_maskz_ipcvtnebf16_epi16 (m8, hxbh);
+ hxi = _mm_ipcvtbf16_epi16 (hxbh);
+ hxi = _mm_mask_ipcvtbf16_epi16 (hxi, m8, hxbh);
+ hxi = _mm_maskz_ipcvtbf16_epi16 (m8, hxbh);
- hxi = _mm_ipcvtnebf16_epu16 (hxbh);
- hxi = _mm_mask_ipcvtnebf16_epu16 (hxi, m8, hxbh);
- hxi = _mm_maskz_ipcvtnebf16_epu16 (m8, hxbh);
+ hxi = _mm_ipcvtbf16_epu16 (hxbh);
+ hxi = _mm_mask_ipcvtbf16_epu16 (hxi, m8, hxbh);
+ hxi = _mm_maskz_ipcvtbf16_epu16 (m8, hxbh);
- hxi = _mm_ipcvttnebf16_epi16 (hxbh);
- hxi = _mm_mask_ipcvttnebf16_epi16 (hxi, m8, hxbh);
- hxi = _mm_maskz_ipcvttnebf16_epi16 (m8, hxbh);
+ hxi = _mm_ipcvttbf16_epi16 (hxbh);
+ hxi = _mm_mask_ipcvttbf16_epi16 (hxi, m8, hxbh);
+ hxi = _mm_maskz_ipcvttbf16_epi16 (m8, hxbh);
- hxi = _mm_ipcvttnebf16_epu16 (hxbh);
- hxi = _mm_mask_ipcvttnebf16_epu16 (hxi, m8, hxbh);
- hxi = _mm_maskz_ipcvttnebf16_epu16 (m8, hxbh);
+ hxi = _mm_ipcvttbf16_epu16 (hxbh);
+ hxi = _mm_mask_ipcvttbf16_epu16 (hxi, m8, hxbh);
+ hxi = _mm_maskz_ipcvttbf16_epu16 (m8, hxbh);
hxi = _mm256_cvtts_roundpd_epi32 (xd, 8);
hxi = _mm256_mask_cvtts_roundpd_epi32 (hxi, m8, xd, 8);
diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtnebf162ibs-2.c
b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbf162ibs-2.c
similarity index 78%
rename from gcc/testsuite/gcc.target/i386/avx10_2-vcvtnebf162ibs-2.c
rename to gcc/testsuite/gcc.target/i386/avx10_2-vcvtbf162ibs-2.c
index 10ced11de27..824ec68a2da 100644
--- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtnebf162ibs-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbf162ibs-2.c
@@ -6,11 +6,11 @@
#define AVX512VL
#define AVX512F_LEN 256
#define AVX512F_LEN_HALF 128
-#include "avx10_2-512-vcvtnebf162ibs-2.c"
+#include "avx10_2-512-vcvtbf162ibs-2.c"
#undef AVX512F_LEN
#undef AVX512F_LEN_HALF
#define AVX512F_LEN 128
#define AVX512F_LEN_HALF 128
-#include "avx10_2-512-vcvtnebf162ibs-2.c"
+#include "avx10_2-512-vcvtbf162ibs-2.c"
diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtnebf162iubs-2.c
b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbf162iubs-2.c
similarity index 77%
rename from gcc/testsuite/gcc.target/i386/avx10_2-vcvtnebf162iubs-2.c
rename to gcc/testsuite/gcc.target/i386/avx10_2-vcvtbf162iubs-2.c
index 660c83de058..b8f99258521 100644
--- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtnebf162iubs-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbf162iubs-2.c
@@ -6,11 +6,11 @@
#define AVX512VL
#define AVX512F_LEN 256
#define AVX512F_LEN_HALF 128
-#include "avx10_2-512-vcvtnebf162iubs-2.c"
+#include "avx10_2-512-vcvtbf162iubs-2.c"
#undef AVX512F_LEN
#undef AVX512F_LEN_HALF
#define AVX512F_LEN 128
#define AVX512F_LEN_HALF 128
-#include "avx10_2-512-vcvtnebf162iubs-2.c"
+#include "avx10_2-512-vcvtbf162iubs-2.c"
diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttnebf162ibs-2.c
b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttbf162ibs-2.c
similarity index 77%
rename from gcc/testsuite/gcc.target/i386/avx10_2-vcvttnebf162ibs-2.c
rename to gcc/testsuite/gcc.target/i386/avx10_2-vcvttbf162ibs-2.c
index 4c7cdc9c6b2..0585048ffa5 100644
--- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttnebf162ibs-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttbf162ibs-2.c
@@ -6,11 +6,11 @@
#define AVX512VL
#define AVX512F_LEN 256
#define AVX512F_LEN_HALF 128
-#include "avx10_2-512-vcvttnebf162ibs-2.c"
+#include "avx10_2-512-vcvttbf162ibs-2.c"
#undef AVX512F_LEN
#undef AVX512F_LEN_HALF
#define AVX512F_LEN 128
#define AVX512F_LEN_HALF 128
-#include "avx10_2-512-vcvttnebf162ibs-2.c"
+#include "avx10_2-512-vcvttbf162ibs-2.c"
diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttnebf162iubs-2.c
b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttbf162iubs-2.c
similarity index 77%
rename from gcc/testsuite/gcc.target/i386/avx10_2-vcvttnebf162iubs-2.c
rename to gcc/testsuite/gcc.target/i386/avx10_2-vcvttbf162iubs-2.c
index 6fed729c670..3082ca04712 100644
--- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttnebf162iubs-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttbf162iubs-2.c
@@ -6,11 +6,11 @@
#define AVX512VL
#define AVX512F_LEN 256
#define AVX512F_LEN_HALF 128
-#include "avx10_2-512-vcvttnebf162iubs-2.c"
+#include "avx10_2-512-vcvttbf162iubs-2.c"
#undef AVX512F_LEN
#undef AVX512F_LEN_HALF
#define AVX512F_LEN 128
#define AVX512F_LEN_HALF 128
-#include "avx10_2-512-vcvttnebf162iubs-2.c"
+#include "avx10_2-512-vcvttbf162iubs-2.c"
--
2.31.1
