From: Pan Li <pan2...@intel.com>
Form 1:
void __attribute__((noinline)) \
vec_strided_load_store_##T##_form_1 (T *restrict out, T *restrict in, \
long stride, size_t size) \
{ \
for (size_t i = 0; i < size; i++) \
out[i * stride] = in[i * stride]; \
}
The below test suites are passed for this patch:
* The riscv fully regression test.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/rvv.exp: Add strided folder.
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f16.c: New test.
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f32.c: New test.
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f64.c: New test.
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i16.c: New test.
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i32.c: New test.
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i64.c: New test.
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i8.c: New test.
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u16.c: New test.
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u32.c: New test.
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u64.c: New test.
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u8.c: New test.
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-f16.c: New
test.
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-f32.c: New
test.
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-f64.c: New
test.
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-i16.c: New
test.
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-i32.c: New
test.
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-i64.c: New
test.
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-i8.c: New
test.
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-u16.c: New
test.
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-u32.c: New
test.
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-u64.c: New
test.
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-u8.c: New
test.
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st.h: New test.
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st_data.h: New test.
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st_run.h: New test.
Signed-off-by: Pan Li <pan2...@intel.com>
Co-Authored-By: Juzhe-Zhong <juzhe.zh...@rivai.ai>
---
.../rvv/autovec/strided/strided_ld_st-1-f16.c | 11 +
.../rvv/autovec/strided/strided_ld_st-1-f32.c | 11 +
.../rvv/autovec/strided/strided_ld_st-1-f64.c | 11 +
.../rvv/autovec/strided/strided_ld_st-1-i16.c | 11 +
.../rvv/autovec/strided/strided_ld_st-1-i32.c | 11 +
.../rvv/autovec/strided/strided_ld_st-1-i64.c | 11 +
.../rvv/autovec/strided/strided_ld_st-1-i8.c | 11 +
.../rvv/autovec/strided/strided_ld_st-1-u16.c | 11 +
.../rvv/autovec/strided/strided_ld_st-1-u32.c | 11 +
.../rvv/autovec/strided/strided_ld_st-1-u64.c | 11 +
.../rvv/autovec/strided/strided_ld_st-1-u8.c | 11 +
.../autovec/strided/strided_ld_st-run-1-f16.c | 15 +
.../autovec/strided/strided_ld_st-run-1-f32.c | 15 +
.../autovec/strided/strided_ld_st-run-1-f64.c | 15 +
.../autovec/strided/strided_ld_st-run-1-i16.c | 15 +
.../autovec/strided/strided_ld_st-run-1-i32.c | 15 +
.../autovec/strided/strided_ld_st-run-1-i64.c | 15 +
.../autovec/strided/strided_ld_st-run-1-i8.c | 15 +
.../autovec/strided/strided_ld_st-run-1-u16.c | 15 +
.../autovec/strided/strided_ld_st-run-1-u32.c | 15 +
.../autovec/strided/strided_ld_st-run-1-u64.c | 15 +
.../autovec/strided/strided_ld_st-run-1-u8.c | 15 +
.../riscv/rvv/autovec/strided/strided_ld_st.h | 22 +
.../rvv/autovec/strided/strided_ld_st_data.h | 1145 +++++++++++++++++
.../rvv/autovec/strided/strided_ld_st_run.h | 27 +
gcc/testsuite/gcc.target/riscv/rvv/rvv.exp | 2 +
26 files changed, 1482 insertions(+)
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f16.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f32.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f64.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i16.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i32.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i64.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i8.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u16.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u32.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u64.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u8.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-f16.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-f32.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-f64.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-i16.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-i32.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-i64.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-i8.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-u16.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-u32.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-u64.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-u8.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st.h
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st_data.h
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st_run.h
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f16.c
new file mode 100644
index 00000000000..41fe2b20a98
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f16.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_zvfh -mabi=lp64d -O3 -fno-vect-cost-model
-fdump-rtl-expand-details" } */
+
+#include "strided_ld_st.h"
+
+DEF_STRIDED_LD_ST_FORM_1(_Float16)
+
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 4 "expand" } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 4 "expand" } }
*/
+/* { dg-final { scan-assembler-times {vlse16.v} 1 } } */
+/* { dg-final { scan-assembler-times {vsse16.v} 1 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f32.c
new file mode 100644
index 00000000000..650b5fce4e8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f32.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-vect-cost-model
-fdump-rtl-expand-details" } */
+
+#include "strided_ld_st.h"
+
+DEF_STRIDED_LD_ST_FORM_1(float)
+
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 4 "expand" } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 4 "expand" } }
*/
+/* { dg-final { scan-assembler-times {vlse32.v} 1 } } */
+/* { dg-final { scan-assembler-times {vsse32.v} 1 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f64.c
new file mode 100644
index 00000000000..c0559a9265e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f64.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-vect-cost-model
-fdump-rtl-expand-details" } */
+
+#include "strided_ld_st.h"
+
+DEF_STRIDED_LD_ST_FORM_1(double)
+
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 4 "expand" } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 4 "expand" } }
*/
+/* { dg-final { scan-assembler-times {vlse64.v} 1 } } */
+/* { dg-final { scan-assembler-times {vsse64.v} 1 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i16.c
new file mode 100644
index 00000000000..641eaf14977
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i16.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-vect-cost-model
-fdump-rtl-expand-details" } */
+
+#include "strided_ld_st.h"
+
+DEF_STRIDED_LD_ST_FORM_1(int16_t)
+
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 4 "expand" } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 4 "expand" } }
*/
+/* { dg-final { scan-assembler-times {vlse16.v} 1 } } */
+/* { dg-final { scan-assembler-times {vsse16.v} 1 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i32.c
new file mode 100644
index 00000000000..5fc1ea91c5b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i32.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-vect-cost-model
-fdump-rtl-expand-details" } */
+
+#include "strided_ld_st.h"
+
+DEF_STRIDED_LD_ST_FORM_1(int32_t)
+
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 4 "expand" } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 4 "expand" } }
*/
+/* { dg-final { scan-assembler-times {vlse32.v} 1 } } */
+/* { dg-final { scan-assembler-times {vsse32.v} 1 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i64.c
new file mode 100644
index 00000000000..1819941cc36
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i64.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-vect-cost-model
-fdump-rtl-expand-details" } */
+
+#include "strided_ld_st.h"
+
+DEF_STRIDED_LD_ST_FORM_1(int64_t)
+
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 4 "expand" } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 4 "expand" } }
*/
+/* { dg-final { scan-assembler-times {vlse64.v} 1 } } */
+/* { dg-final { scan-assembler-times {vsse64.v} 1 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i8.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i8.c
new file mode 100644
index 00000000000..119a6d75fba
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i8.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-vect-cost-model
-fdump-rtl-expand-details" } */
+
+#include "strided_ld_st.h"
+
+DEF_STRIDED_LD_ST_FORM_1(int8_t)
+
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 4 "expand" } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 4 "expand" } }
*/
+/* { dg-final { scan-assembler-times {vlse8.v} 1 } } */
+/* { dg-final { scan-assembler-times {vsse8.v} 1 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u16.c
new file mode 100644
index 00000000000..19d4f6edc87
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u16.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-vect-cost-model
-fdump-rtl-expand-details" } */
+
+#include "strided_ld_st.h"
+
+DEF_STRIDED_LD_ST_FORM_1(uint16_t)
+
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 4 "expand" } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 4 "expand" } }
*/
+/* { dg-final { scan-assembler-times {vlse16.v} 1 } } */
+/* { dg-final { scan-assembler-times {vsse16.v} 1 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u32.c
new file mode 100644
index 00000000000..10b1d4fefb5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u32.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-vect-cost-model
-fdump-rtl-expand-details" } */
+
+#include "strided_ld_st.h"
+
+DEF_STRIDED_LD_ST_FORM_1(uint32_t)
+
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 4 "expand" } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 4 "expand" } }
*/
+/* { dg-final { scan-assembler-times {vlse32.v} 1 } } */
+/* { dg-final { scan-assembler-times {vsse32.v} 1 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u64.c
new file mode 100644
index 00000000000..b1654b8c80f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u64.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-vect-cost-model
-fdump-rtl-expand-details" } */
+
+#include "strided_ld_st.h"
+
+DEF_STRIDED_LD_ST_FORM_1(uint64_t)
+
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 4 "expand" } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 4 "expand" } }
*/
+/* { dg-final { scan-assembler-times {vlse64.v} 1 } } */
+/* { dg-final { scan-assembler-times {vsse64.v} 1 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u8.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u8.c
new file mode 100644
index 00000000000..273dcb83b0b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u8.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-vect-cost-model
-fdump-rtl-expand-details" } */
+
+#include "strided_ld_st.h"
+
+DEF_STRIDED_LD_ST_FORM_1(uint8_t)
+
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 4 "expand" } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 4 "expand" } }
*/
+/* { dg-final { scan-assembler-times {vlse8.v} 1 } } */
+/* { dg-final { scan-assembler-times {vsse8.v} 1 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-f16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-f16.c
new file mode 100644
index 00000000000..21dd7dc6d7f
--- /dev/null
+++
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-f16.c
@@ -0,0 +1,15 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model" } */
+
+#include "strided_ld_st.h"
+#include "strided_ld_st_data.h"
+
+#define T _Float16
+
+DEF_STRIDED_LD_ST_FORM_1_WRAP(T)
+
+#define DATA TEST_STRIDED_LD_ST_DATA_WRAP(T)
+#define RUN_STRIDED_LD_ST(out, in, stride, size) \
+ RUN_STRIDED_LD_ST_FORM_1_WRAP(T, out, in, stride, size)
+
+#include "strided_ld_st_run.h"
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-f32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-f32.c
new file mode 100644
index 00000000000..da3932bfa86
--- /dev/null
+++
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-f32.c
@@ -0,0 +1,15 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model" } */
+
+#include "strided_ld_st.h"
+#include "strided_ld_st_data.h"
+
+#define T float
+
+DEF_STRIDED_LD_ST_FORM_1_WRAP(T)
+
+#define DATA TEST_STRIDED_LD_ST_DATA_WRAP(T)
+#define RUN_STRIDED_LD_ST(out, in, stride, size) \
+ RUN_STRIDED_LD_ST_FORM_1_WRAP(T, out, in, stride, size)
+
+#include "strided_ld_st_run.h"
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-f64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-f64.c
new file mode 100644
index 00000000000..4e7ec6eb0f8
--- /dev/null
+++
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-f64.c
@@ -0,0 +1,15 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model" } */
+
+#include "strided_ld_st.h"
+#include "strided_ld_st_data.h"
+
+#define T double
+
+DEF_STRIDED_LD_ST_FORM_1_WRAP(T)
+
+#define DATA TEST_STRIDED_LD_ST_DATA_WRAP(T)
+#define RUN_STRIDED_LD_ST(out, in, stride, size) \
+ RUN_STRIDED_LD_ST_FORM_1_WRAP(T, out, in, stride, size)
+
+#include "strided_ld_st_run.h"
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-i16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-i16.c
new file mode 100644
index 00000000000..64791064b72
--- /dev/null
+++
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-i16.c
@@ -0,0 +1,15 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model" } */
+
+#include "strided_ld_st.h"
+#include "strided_ld_st_data.h"
+
+#define T int16_t
+
+DEF_STRIDED_LD_ST_FORM_1_WRAP(T)
+
+#define DATA TEST_STRIDED_LD_ST_DATA_WRAP(T)
+#define RUN_STRIDED_LD_ST(out, in, stride, size) \
+ RUN_STRIDED_LD_ST_FORM_1_WRAP(T, out, in, stride, size)
+
+#include "strided_ld_st_run.h"
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-i32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-i32.c
new file mode 100644
index 00000000000..223a894a5fe
--- /dev/null
+++
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-i32.c
@@ -0,0 +1,15 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model" } */
+
+#include "strided_ld_st.h"
+#include "strided_ld_st_data.h"
+
+#define T int32_t
+
+DEF_STRIDED_LD_ST_FORM_1_WRAP(T)
+
+#define DATA TEST_STRIDED_LD_ST_DATA_WRAP(T)
+#define RUN_STRIDED_LD_ST(out, in, stride, size) \
+ RUN_STRIDED_LD_ST_FORM_1_WRAP(T, out, in, stride, size)
+
+#include "strided_ld_st_run.h"
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-i64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-i64.c
new file mode 100644
index 00000000000..1835b419048
--- /dev/null
+++
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-i64.c
@@ -0,0 +1,15 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model" } */
+
+#include "strided_ld_st.h"
+#include "strided_ld_st_data.h"
+
+#define T int64_t
+
+DEF_STRIDED_LD_ST_FORM_1_WRAP(T)
+
+#define DATA TEST_STRIDED_LD_ST_DATA_WRAP(T)
+#define RUN_STRIDED_LD_ST(out, in, stride, size) \
+ RUN_STRIDED_LD_ST_FORM_1_WRAP(T, out, in, stride, size)
+
+#include "strided_ld_st_run.h"
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-i8.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-i8.c
new file mode 100644
index 00000000000..cee43db9a0d
--- /dev/null
+++
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-i8.c
@@ -0,0 +1,15 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model" } */
+
+#include "strided_ld_st.h"
+#include "strided_ld_st_data.h"
+
+#define T int8_t
+
+DEF_STRIDED_LD_ST_FORM_1_WRAP(T)
+
+#define DATA TEST_STRIDED_LD_ST_DATA_WRAP(T)
+#define RUN_STRIDED_LD_ST(out, in, stride, size) \
+ RUN_STRIDED_LD_ST_FORM_1_WRAP(T, out, in, stride, size)
+
+#include "strided_ld_st_run.h"
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-u16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-u16.c
new file mode 100644
index 00000000000..6fe2a579325
--- /dev/null
+++
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-u16.c
@@ -0,0 +1,15 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model" } */
+
+#include "strided_ld_st.h"
+#include "strided_ld_st_data.h"
+
+#define T uint16_t
+
+DEF_STRIDED_LD_ST_FORM_1_WRAP(T)
+
+#define DATA TEST_STRIDED_LD_ST_DATA_WRAP(T)
+#define RUN_STRIDED_LD_ST(out, in, stride, size) \
+ RUN_STRIDED_LD_ST_FORM_1_WRAP(T, out, in, stride, size)
+
+#include "strided_ld_st_run.h"
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-u32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-u32.c
new file mode 100644
index 00000000000..f2a7ece4839
--- /dev/null
+++
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-u32.c
@@ -0,0 +1,15 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model" } */
+
+#include "strided_ld_st.h"
+#include "strided_ld_st_data.h"
+
+#define T uint32_t
+
+DEF_STRIDED_LD_ST_FORM_1_WRAP(T)
+
+#define DATA TEST_STRIDED_LD_ST_DATA_WRAP(T)
+#define RUN_STRIDED_LD_ST(out, in, stride, size) \
+ RUN_STRIDED_LD_ST_FORM_1_WRAP(T, out, in, stride, size)
+
+#include "strided_ld_st_run.h"
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-u64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-u64.c
new file mode 100644
index 00000000000..19490a39709
--- /dev/null
+++
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-u64.c
@@ -0,0 +1,15 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model" } */
+
+#include "strided_ld_st.h"
+#include "strided_ld_st_data.h"
+
+#define T uint64_t
+
+DEF_STRIDED_LD_ST_FORM_1_WRAP(T)
+
+#define DATA TEST_STRIDED_LD_ST_DATA_WRAP(T)
+#define RUN_STRIDED_LD_ST(out, in, stride, size) \
+ RUN_STRIDED_LD_ST_FORM_1_WRAP(T, out, in, stride, size)
+
+#include "strided_ld_st_run.h"
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-u8.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-u8.c
new file mode 100644
index 00000000000..e9c3b9e40db
--- /dev/null
+++
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-run-1-u8.c
@@ -0,0 +1,15 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model" } */
+
+#include "strided_ld_st.h"
+#include "strided_ld_st_data.h"
+
+#define T uint8_t
+
+DEF_STRIDED_LD_ST_FORM_1_WRAP(T)
+
+#define DATA TEST_STRIDED_LD_ST_DATA_WRAP(T)
+#define RUN_STRIDED_LD_ST(out, in, stride, size) \
+ RUN_STRIDED_LD_ST_FORM_1_WRAP(T, out, in, stride, size)
+
+#include "strided_ld_st_run.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st.h
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st.h
new file mode 100644
index 00000000000..8c86deca839
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st.h
@@ -0,0 +1,22 @@
+#ifndef HAVE_DEFINED_STRIDED_H
+#define HAVE_DEFINED_STRIDED_H
+
+#include <stdint-gcc.h>
+#include <stdbool.h>
+#include <stddef.h>
+
+#define DEF_STRIDED_LD_ST_FORM_1(T) \
+ void __attribute__((noinline)) \
+ vec_strided_load_store_##T##_form_1 (T *restrict out, T *restrict in, \
+ long stride, size_t size) \
+ { \
+ for (size_t i = 0; i < size; i++) \
+ out[i * stride] = in[i * stride]; \
+ }
+#define DEF_STRIDED_LD_ST_FORM_1_WRAP(T) DEF_STRIDED_LD_ST_FORM_1(T)
+#define RUN_STRIDED_LD_ST_FORM_1(T, out, in, stride, size) \
+ vec_strided_load_store_##T##_form_1 (out, in, stride, size)
+#define RUN_STRIDED_LD_ST_FORM_1_WRAP(T, out, in, stride, size) \
+ RUN_STRIDED_LD_ST_FORM_1(T, out, in, stride, size)
+
+#endif
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st_data.h
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st_data.h
new file mode 100644
index 00000000000..ebf81970ef0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st_data.h
@@ -0,0 +1,1145 @@
+#ifndef HAVE_DEFINED_STRIDED_DATA_H
+#define HAVE_DEFINED_STRIDED_DATA_H
+
+#include <stdint-gcc.h>
+#include <stdbool.h>
+#include <stddef.h>
+
+#define N 32
+#define TEST_STRIDED_LD_ST_DATA(T) test_strided_ld_st_##T##_data
+#define TEST_STRIDED_LD_ST_DATA_WRAP(T) TEST_STRIDED_LD_ST_DATA(T)
+
+int8_t TEST_STRIDED_LD_ST_DATA(int8_t)[][4][N] =
+{
+ {
+ { 1 }, /* stride */
+ { /* input */
+ 1, 0, 0, 0,
+ 0, 1, 0, 0,
+ 0, 0, 1, 0,
+ 0, 0, 0, 1,
+ 1, 0, 0, 0,
+ 0, 1, 0, 0,
+ 0, 0, 1, 0,
+ 0, 0, 0, 1,
+ },
+ { /* output */
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ },
+ { /* expect */
+ 1, 0, 0, 0,
+ 0, 1, 0, 0,
+ 0, 0, 1, 0,
+ 0, 0, 0, 1,
+ 1, 0, 0, 0,
+ 0, 1, 0, 0,
+ 0, 0, 1, 0,
+ 0, 0, 0, 1,
+ },
+ },
+ {
+ { 2 }, /* stride */
+ { /* input */
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ },
+ { /* output */
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ },
+ { /* expect */
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ },
+ },
+ {
+ { 4 }, /* stride */
+ { /* input */
+ 127, 127, 127, 127,
+ 127, 127, 127, 127,
+ 127, 127, 127, 127,
+ 127, 127, 127, 127,
+ -128, -128, -128, -128,
+ -128, -128, -128, -128,
+ -128, -128, -128, -128,
+ -128, -128, -128, -128,
+ },
+ { /* output */
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ },
+ { /* expect */
+ 127, 0, 0, 0,
+ 127, 0, 0, 0,
+ 127, 0, 0, 0,
+ 127, 0, 0, 0,
+ -128, 0, 0, 0,
+ -128, 0, 0, 0,
+ -128, 0, 0, 0,
+ -128, 0, 0, 0,
+ },
+ },
+};
+
+int16_t TEST_STRIDED_LD_ST_DATA(int16_t)[][4][N] =
+{
+ {
+ { 1 }, /* stride */
+ { /* input */
+ 1, 0, 0, 0,
+ 0, 1, 0, 0,
+ 0, 0, 1, 0,
+ 0, 0, 0, 1,
+ 1, 0, 0, 0,
+ 0, 1, 0, 0,
+ 0, 0, 1, 0,
+ 0, 0, 0, 1,
+ },
+ { /* output */
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ },
+ { /* expect */
+ 1, 0, 0, 0,
+ 0, 1, 0, 0,
+ 0, 0, 1, 0,
+ 0, 0, 0, 1,
+ 1, 0, 0, 0,
+ 0, 1, 0, 0,
+ 0, 0, 1, 0,
+ 0, 0, 0, 1,
+ },
+ },
+ {
+ { 2 }, /* stride */
+ { /* input */
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ },
+ { /* output */
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ },
+ { /* expect */
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ },
+ },
+ {
+ { 4 }, /* stride */
+ { /* input */
+ 32767, 32767, 32767, 32767,
+ 32767, 32767, 32767, 32767,
+ 32767, 32767, 32767, 32767,
+ 32767, 32767, 32767, 32767,
+ -32768, -32768, -32768, -32768,
+ -32768, -32768, -32768, -32768,
+ -32768, -32768, -32768, -32768,
+ -32768, -32768, -32768, -32768,
+ },
+ { /* output */
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ },
+ { /* expect */
+ 32767, 0, 0, 0,
+ 32767, 0, 0, 0,
+ 32767, 0, 0, 0,
+ 32767, 0, 0, 0,
+ -32768, 0, 0, 0,
+ -32768, 0, 0, 0,
+ -32768, 0, 0, 0,
+ -32768, 0, 0, 0,
+ },
+ },
+};
+
+int32_t TEST_STRIDED_LD_ST_DATA(int32_t)[][4][N] =
+{
+ {
+ { 1 }, /* stride */
+ { /* input */
+ 1, 0, 0, 0,
+ 0, 1, 0, 0,
+ 0, 0, 1, 0,
+ 0, 0, 0, 1,
+ 1, 0, 0, 0,
+ 0, 1, 0, 0,
+ 0, 0, 1, 0,
+ 0, 0, 0, 1,
+ },
+ { /* output */
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ },
+ { /* expect */
+ 1, 0, 0, 0,
+ 0, 1, 0, 0,
+ 0, 0, 1, 0,
+ 0, 0, 0, 1,
+ 1, 0, 0, 0,
+ 0, 1, 0, 0,
+ 0, 0, 1, 0,
+ 0, 0, 0, 1,
+ },
+ },
+ {
+ { 2 }, /* stride */
+ { /* input */
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ },
+ { /* output */
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ },
+ { /* expect */
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ },
+ },
+ {
+ { 4 }, /* stride */
+ { /* input */
+ 2147483647, 2147483647, 2147483647, 2147483647,
+ 2147483647, 2147483647, 2147483647, 2147483647,
+ 2147483647, 2147483647, 2147483647, 2147483647,
+ 2147483647, 2147483647, 2147483647, 2147483647,
+ -2147483648, -2147483648, -2147483648, -2147483648,
+ -2147483648, -2147483648, -2147483648, -2147483648,
+ -2147483648, -2147483648, -2147483648, -2147483648,
+ -2147483648, -2147483648, -2147483648, -2147483648,
+ },
+ { /* output */
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ },
+ { /* expect */
+ 2147483647, 0, 0, 0,
+ 2147483647, 0, 0, 0,
+ 2147483647, 0, 0, 0,
+ 2147483647, 0, 0, 0,
+ -2147483648, 0, 0, 0,
+ -2147483648, 0, 0, 0,
+ -2147483648, 0, 0, 0,
+ -2147483648, 0, 0, 0,
+ },
+ },
+};
+
+int64_t TEST_STRIDED_LD_ST_DATA(int64_t)[][4][N] =
+{
+ {
+ { 1 }, /* stride */
+ { /* input */
+ 1, 0, 0, 0,
+ 0, 1, 0, 0,
+ 0, 0, 1, 0,
+ 0, 0, 0, 1,
+ 1, 0, 0, 0,
+ 0, 1, 0, 0,
+ 0, 0, 1, 0,
+ 0, 0, 0, 1,
+ },
+ { /* output */
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ },
+ { /* expect */
+ 1, 0, 0, 0,
+ 0, 1, 0, 0,
+ 0, 0, 1, 0,
+ 0, 0, 0, 1,
+ 1, 0, 0, 0,
+ 0, 1, 0, 0,
+ 0, 0, 1, 0,
+ 0, 0, 0, 1,
+ },
+ },
+ {
+ { 2 }, /* stride */
+ { /* input */
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ },
+ { /* output */
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ },
+ { /* expect */
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ },
+ },
+ {
+ { 4 }, /* stride */
+ { /* input */
+ 9223372036854775807ll, 9223372036854775807ll,
9223372036854775807ll, 9223372036854775807ll,
+ 9223372036854775807ll, 9223372036854775807ll,
9223372036854775807ll, 9223372036854775807ll,
+ 9223372036854775807ll, 9223372036854775807ll,
9223372036854775807ll, 9223372036854775807ll,
+ 9223372036854775807ll, 9223372036854775807ll,
9223372036854775807ll, 9223372036854775807ll,
+ -9223372036854775808ull, -9223372036854775808ull,
-9223372036854775808ull, -9223372036854775808ull,
+ -9223372036854775808ull, -9223372036854775808ull,
-9223372036854775808ull, -9223372036854775808ull,
+ -9223372036854775808ull, -9223372036854775808ull,
-9223372036854775808ull, -9223372036854775808ull,
+ -9223372036854775808ull, -9223372036854775808ull,
-9223372036854775808ull, -9223372036854775808ull,
+ },
+ { /* output */
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ },
+ { /* expect */
+ 9223372036854775807ll, 0, 0, 0,
+ 9223372036854775807ll, 0, 0, 0,
+ 9223372036854775807ll, 0, 0, 0,
+ 9223372036854775807ll, 0, 0, 0,
+ -9223372036854775808ull, 0, 0, 0,
+ -9223372036854775808ull, 0, 0, 0,
+ -9223372036854775808ull, 0, 0, 0,
+ -9223372036854775808ull, 0, 0, 0,
+ },
+ },
+};
+
+uint8_t TEST_STRIDED_LD_ST_DATA(uint8_t)[][4][N] =
+{
+ {
+ { 1 }, /* stride */
+ { /* input */
+ 1, 0, 0, 0,
+ 0, 1, 0, 0,
+ 0, 0, 1, 0,
+ 0, 0, 0, 1,
+ 1, 0, 0, 0,
+ 0, 1, 0, 0,
+ 0, 0, 1, 0,
+ 0, 0, 0, 1,
+ },
+ { /* output */
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ },
+ { /* expect */
+ 1, 0, 0, 0,
+ 0, 1, 0, 0,
+ 0, 0, 1, 0,
+ 0, 0, 0, 1,
+ 1, 0, 0, 0,
+ 0, 1, 0, 0,
+ 0, 0, 1, 0,
+ 0, 0, 0, 1,
+ },
+ },
+ {
+ { 2 }, /* stride */
+ { /* input */
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ },
+ { /* output */
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ },
+ { /* expect */
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ },
+ },
+ {
+ { 4 }, /* stride */
+ { /* input */
+ 255, 255, 255, 255,
+ 255, 255, 255, 255,
+ 255, 255, 255, 255,
+ 255, 255, 255, 255,
+ 254, 254, 254, 254,
+ 254, 254, 254, 254,
+ 254, 254, 254, 254,
+ 254, 254, 254, 254,
+ },
+ { /* output */
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ },
+ { /* expect */
+ 255, 0, 0, 0,
+ 255, 0, 0, 0,
+ 255, 0, 0, 0,
+ 255, 0, 0, 0,
+ 254, 0, 0, 0,
+ 254, 0, 0, 0,
+ 254, 0, 0, 0,
+ 254, 0, 0, 0,
+ },
+ },
+};
+
+uint16_t TEST_STRIDED_LD_ST_DATA(uint16_t)[][4][N] =
+{
+ {
+ { 1 }, /* stride */
+ { /* input */
+ 1, 0, 0, 0,
+ 0, 1, 0, 0,
+ 0, 0, 1, 0,
+ 0, 0, 0, 1,
+ 1, 0, 0, 0,
+ 0, 1, 0, 0,
+ 0, 0, 1, 0,
+ 0, 0, 0, 1,
+ },
+ { /* output */
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ },
+ { /* expect */
+ 1, 0, 0, 0,
+ 0, 1, 0, 0,
+ 0, 0, 1, 0,
+ 0, 0, 0, 1,
+ 1, 0, 0, 0,
+ 0, 1, 0, 0,
+ 0, 0, 1, 0,
+ 0, 0, 0, 1,
+ },
+ },
+ {
+ { 2 }, /* stride */
+ { /* input */
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ },
+ { /* output */
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ },
+ { /* expect */
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ },
+ },
+ {
+ { 4 }, /* stride */
+ { /* input */
+ 65535, 65535, 65535, 65535,
+ 65535, 65535, 65535, 65535,
+ 65535, 65535, 65535, 65535,
+ 65535, 65535, 65535, 65535,
+ 65534, 65534, 65534, 65534,
+ 65534, 65534, 65534, 65534,
+ 65534, 65534, 65534, 65534,
+ 65534, 65534, 65534, 65534,
+ },
+ { /* output */
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ },
+ { /* expect */
+ 65535, 0, 0, 0,
+ 65535, 0, 0, 0,
+ 65535, 0, 0, 0,
+ 65535, 0, 0, 0,
+ 65534, 0, 0, 0,
+ 65534, 0, 0, 0,
+ 65534, 0, 0, 0,
+ 65534, 0, 0, 0,
+ },
+ },
+};
+
+uint32_t TEST_STRIDED_LD_ST_DATA(uint32_t)[][4][N] =
+{
+ {
+ { 1 }, /* stride */
+ { /* input */
+ 1, 0, 0, 0,
+ 0, 1, 0, 0,
+ 0, 0, 1, 0,
+ 0, 0, 0, 1,
+ 1, 0, 0, 0,
+ 0, 1, 0, 0,
+ 0, 0, 1, 0,
+ 0, 0, 0, 1,
+ },
+ { /* output */
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ },
+ { /* expect */
+ 1, 0, 0, 0,
+ 0, 1, 0, 0,
+ 0, 0, 1, 0,
+ 0, 0, 0, 1,
+ 1, 0, 0, 0,
+ 0, 1, 0, 0,
+ 0, 0, 1, 0,
+ 0, 0, 0, 1,
+ },
+ },
+ {
+ { 2 }, /* stride */
+ { /* input */
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ },
+ { /* output */
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ },
+ { /* expect */
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ },
+ },
+ {
+ { 4 }, /* stride */
+ { /* input */
+ 4294967295, 4294967295, 4294967295, 4294967295,
+ 4294967295, 4294967295, 4294967295, 4294967295,
+ 4294967295, 4294967295, 4294967295, 4294967295,
+ 4294967295, 4294967295, 4294967295, 4294967295,
+ 4294967294, 4294967294, 4294967294, 4294967294,
+ 4294967294, 4294967294, 4294967294, 4294967294,
+ 4294967294, 4294967294, 4294967294, 4294967294,
+ 4294967294, 4294967294, 4294967294, 4294967294,
+ },
+ { /* output */
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ },
+ { /* expect */
+ 4294967295, 0, 0, 0,
+ 4294967295, 0, 0, 0,
+ 4294967295, 0, 0, 0,
+ 4294967295, 0, 0, 0,
+ 4294967294, 0, 0, 0,
+ 4294967294, 0, 0, 0,
+ 4294967294, 0, 0, 0,
+ 4294967294, 0, 0, 0,
+ },
+ },
+};
+
+uint64_t TEST_STRIDED_LD_ST_DATA(uint64_t)[][4][N] =
+{
+ {
+ { 1 }, /* stride */
+ { /* input */
+ 1, 0, 0, 0,
+ 0, 1, 0, 0,
+ 0, 0, 1, 0,
+ 0, 0, 0, 1,
+ 1, 0, 0, 0,
+ 0, 1, 0, 0,
+ 0, 0, 1, 0,
+ 0, 0, 0, 1,
+ },
+ { /* output */
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ },
+ { /* expect */
+ 1, 0, 0, 0,
+ 0, 1, 0, 0,
+ 0, 0, 1, 0,
+ 0, 0, 0, 1,
+ 1, 0, 0, 0,
+ 0, 1, 0, 0,
+ 0, 0, 1, 0,
+ 0, 0, 0, 1,
+ },
+ },
+ {
+ { 2 }, /* stride */
+ { /* input */
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ 2, 3, 9, 7,
+ },
+ { /* output */
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ },
+ { /* expect */
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ 2, 0, 9, 0,
+ },
+ },
+ {
+ { 4 }, /* stride */
+ { /* input */
+ 18446744073709551615ull, 18446744073709551615ull,
18446744073709551615ull, 18446744073709551615ull,
+ 18446744073709551615ull, 18446744073709551615ull,
18446744073709551615ull, 18446744073709551615ull,
+ 18446744073709551615ull, 18446744073709551615ull,
18446744073709551615ull, 18446744073709551615ull,
+ 18446744073709551615ull, 18446744073709551615ull,
18446744073709551615ull, 18446744073709551615ull,
+ 18446744073709551614ull, 18446744073709551614ull,
18446744073709551614ull, 18446744073709551614ull,
+ 18446744073709551614ull, 18446744073709551614ull,
18446744073709551614ull, 18446744073709551614ull,
+ 18446744073709551614ull, 18446744073709551614ull,
18446744073709551614ull, 18446744073709551614ull,
+ 18446744073709551614ull, 18446744073709551614ull,
18446744073709551614ull, 18446744073709551614ull,
+ },
+ { /* output */
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ },
+ { /* expect */
+ 18446744073709551615ull, 0, 0, 0,
+ 18446744073709551615ull, 0, 0, 0,
+ 18446744073709551615ull, 0, 0, 0,
+ 18446744073709551615ull, 0, 0, 0,
+ 18446744073709551614ull, 0, 0, 0,
+ 18446744073709551614ull, 0, 0, 0,
+ 18446744073709551614ull, 0, 0, 0,
+ 18446744073709551614ull, 0, 0, 0,
+ },
+ },
+};
+
+_Float16 TEST_STRIDED_LD_ST_DATA(_Float16)[][4][N] =
+{
+ {
+ { 1 }, /* stride */
+ { /* input */
+ 1.4, 0.2, 0.8, 0.8,
+ 0.4, 1.2, 0.8, 0.8,
+ 0.4, 0.2, 1.8, 0.8,
+ 0.4, 0.2, 0.8, 1.8,
+ 1.4, 0.2, 0.8, 0.8,
+ 0.4, 1.2, 0.8, 0.8,
+ 0.4, 0.2, 1.8, 0.8,
+ 0.4, 0.2, 0.8, 1.8,
+ },
+ { /* output */
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ },
+ { /* expect */
+ 1.4, 0.2, 0.8, 0.8,
+ 0.4, 1.2, 0.8, 0.8,
+ 0.4, 0.2, 1.8, 0.8,
+ 0.4, 0.2, 0.8, 1.8,
+ 1.4, 0.2, 0.8, 0.8,
+ 0.4, 1.2, 0.8, 0.8,
+ 0.4, 0.2, 1.8, 0.8,
+ 0.4, 0.2, 0.8, 1.8,
+ },
+ },
+ {
+ { 2 }, /* stride */
+ { /* input */
+ 2.6, 3.1, 9.4, 7.8,
+ 2.6, 3.1, 9.4, 7.8,
+ 2.6, 3.1, 9.4, 7.8,
+ 2.6, 3.1, 9.4, 7.8,
+ 2.6, 3.1, 9.4, 7.8,
+ 2.6, 3.1, 9.4, 7.8,
+ 2.6, 3.1, 9.4, 7.8,
+ 2.6, 3.1, 9.4, 7.8,
+ },
+ { /* output */
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ },
+ { /* expect */
+ 2.6, 0.0, 9.4, 0.0,
+ 2.6, 0.0, 9.4, 0.0,
+ 2.6, 0.0, 9.4, 0.0,
+ 2.6, 0.0, 9.4, 0.0,
+ 2.6, 0.0, 9.4, 0.0,
+ 2.6, 0.0, 9.4, 0.0,
+ 2.6, 0.0, 9.4, 0.0,
+ 2.6, 0.0, 9.4, 0.0,
+ },
+ },
+ {
+ { 4 }, /* stride */
+ { /* input */
+ 127.8, 127.8, 127.8, 127.8,
+ 127.8, 127.8, 127.8, 127.8,
+ 127.8, 127.8, 127.8, 127.8,
+ 127.8, 127.8, 127.8, 127.8,
+ -128.2, -128.2, -128.2, -128.2,
+ -128.2, -128.2, -128.2, -128.2,
+ -128.2, -128.2, -128.2, -128.2,
+ -128.2, -128.2, -128.2, -128.2,
+ },
+ { /* output */
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ },
+ { /* expect */
+ 127.8, 0, 0, 0,
+ 127.8, 0, 0, 0,
+ 127.8, 0, 0, 0,
+ 127.8, 0, 0, 0,
+ -128.2, 0, 0, 0,
+ -128.2, 0, 0, 0,
+ -128.2, 0, 0, 0,
+ -128.2, 0, 0, 0,
+ },
+ },
+};
+
+float TEST_STRIDED_LD_ST_DATA(float)[][4][N] =
+{
+ {
+ { 1 }, /* stride */
+ { /* input */
+ 1.4, 0.2, 0.8, 0.8,
+ 0.4, 1.2, 0.8, 0.8,
+ 0.4, 0.2, 1.8, 0.8,
+ 0.4, 0.2, 0.8, 1.8,
+ 1.4, 0.2, 0.8, 0.8,
+ 0.4, 1.2, 0.8, 0.8,
+ 0.4, 0.2, 1.8, 0.8,
+ 0.4, 0.2, 0.8, 1.8,
+ },
+ { /* output */
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ },
+ { /* expect */
+ 1.4, 0.2, 0.8, 0.8,
+ 0.4, 1.2, 0.8, 0.8,
+ 0.4, 0.2, 1.8, 0.8,
+ 0.4, 0.2, 0.8, 1.8,
+ 1.4, 0.2, 0.8, 0.8,
+ 0.4, 1.2, 0.8, 0.8,
+ 0.4, 0.2, 1.8, 0.8,
+ 0.4, 0.2, 0.8, 1.8,
+ },
+ },
+ {
+ { 2 }, /* stride */
+ { /* input */
+ 2.6, 3.1, 9.4, 7.8,
+ 2.6, 3.1, 9.4, 7.8,
+ 2.6, 3.1, 9.4, 7.8,
+ 2.6, 3.1, 9.4, 7.8,
+ 2.6, 3.1, 9.4, 7.8,
+ 2.6, 3.1, 9.4, 7.8,
+ 2.6, 3.1, 9.4, 7.8,
+ 2.6, 3.1, 9.4, 7.8,
+ },
+ { /* output */
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ },
+ { /* expect */
+ 2.6, 0.0, 9.4, 0.0,
+ 2.6, 0.0, 9.4, 0.0,
+ 2.6, 0.0, 9.4, 0.0,
+ 2.6, 0.0, 9.4, 0.0,
+ 2.6, 0.0, 9.4, 0.0,
+ 2.6, 0.0, 9.4, 0.0,
+ 2.6, 0.0, 9.4, 0.0,
+ 2.6, 0.0, 9.4, 0.0,
+ },
+ },
+ {
+ { 4 }, /* stride */
+ { /* input */
+ 148885872271752691712.0, 148885872271752691712.0,
148885872271752691712.0, 148885872271752691712.0,
+ 148885872271752691712.0, 148885872271752691712.0,
148885872271752691712.0, 148885872271752691712.0,
+ 148885872271752691712.0, 148885872271752691712.0,
148885872271752691712.0, 148885872271752691712.0,
+ 148885872271752691712.0, 148885872271752691712.0,
148885872271752691712.0, 148885872271752691712.0,
+ -639460027801474761417333669888.0, -639460027801474761417333669888.0,
-639460027801474761417333669888.0, -639460027801474761417333669888.0,
+ -639460027801474761417333669888.0, -639460027801474761417333669888.0,
-639460027801474761417333669888.0, -639460027801474761417333669888.0,
+ -639460027801474761417333669888.0, -639460027801474761417333669888.0,
-639460027801474761417333669888.0, -639460027801474761417333669888.0,
+ -639460027801474761417333669888.0, -639460027801474761417333669888.0,
-639460027801474761417333669888.0, -639460027801474761417333669888.0,
+ },
+ { /* output */
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ },
+ { /* expect */
+ 148885872271752691712.0, 0, 0, 0,
+ 148885872271752691712.0, 0, 0, 0,
+ 148885872271752691712.0, 0, 0, 0,
+ 148885872271752691712.0, 0, 0, 0,
+ -639460027801474761417333669888.0, 0, 0, 0,
+ -639460027801474761417333669888.0, 0, 0, 0,
+ -639460027801474761417333669888.0, 0, 0, 0,
+ -639460027801474761417333669888.0, 0, 0, 0,
+ },
+ },
+};
+
+double TEST_STRIDED_LD_ST_DATA(double)[][4][N] =
+{
+ {
+ { 1 }, /* stride */
+ { /* input */
+ 1.4, 0.2, 0.8, 0.8,
+ 0.4, 1.2, 0.8, 0.8,
+ 0.4, 0.2, 1.8, 0.8,
+ 0.4, 0.2, 0.8, 1.8,
+ 1.4, 0.2, 0.8, 0.8,
+ 0.4, 1.2, 0.8, 0.8,
+ 0.4, 0.2, 1.8, 0.8,
+ 0.4, 0.2, 0.8, 1.8,
+ },
+ { /* output */
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ },
+ { /* expect */
+ 1.4, 0.2, 0.8, 0.8,
+ 0.4, 1.2, 0.8, 0.8,
+ 0.4, 0.2, 1.8, 0.8,
+ 0.4, 0.2, 0.8, 1.8,
+ 1.4, 0.2, 0.8, 0.8,
+ 0.4, 1.2, 0.8, 0.8,
+ 0.4, 0.2, 1.8, 0.8,
+ 0.4, 0.2, 0.8, 1.8,
+ },
+ },
+ {
+ { 2 }, /* stride */
+ { /* input */
+ 2.6, 3.1, 9.4, 7.8,
+ 2.6, 3.1, 9.4, 7.8,
+ 2.6, 3.1, 9.4, 7.8,
+ 2.6, 3.1, 9.4, 7.8,
+ 2.6, 3.1, 9.4, 7.8,
+ 2.6, 3.1, 9.4, 7.8,
+ 2.6, 3.1, 9.4, 7.8,
+ 2.6, 3.1, 9.4, 7.8,
+ },
+ { /* output */
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ 0.0, 0.0, 0.0, 0.0,
+ },
+ { /* expect */
+ 2.6, 0.0, 9.4, 0.0,
+ 2.6, 0.0, 9.4, 0.0,
+ 2.6, 0.0, 9.4, 0.0,
+ 2.6, 0.0, 9.4, 0.0,
+ 2.6, 0.0, 9.4, 0.0,
+ 2.6, 0.0, 9.4, 0.0,
+ 2.6, 0.0, 9.4, 0.0,
+ 2.6, 0.0, 9.4, 0.0,
+ },
+ },
+ {
+ { 4 }, /* stride */
+ { /* input */
+ 98789784453484056064183762944.0, 98789784453484056064183762944.0,
98789784453484056064183762944.0, 98789784453484056064183762944.0,
+ 98789784453484056064183762944.0, 98789784453484056064183762944.0,
98789784453484056064183762944.0, 98789784453484056064183762944.0,
+ 98789784453484056064183762944.0, 98789784453484056064183762944.0,
98789784453484056064183762944.0, 98789784453484056064183762944.0,
+ 98789784453484056064183762944.0, 98789784453484056064183762944.0,
98789784453484056064183762944.0, 98789784453484056064183762944.0,
+ -1507412482505555054690304.0, -1507412482505555054690304.0,
-1507412482505555054690304.0, -1507412482505555054690304.0,
+ -1507412482505555054690304.0, -1507412482505555054690304.0,
-1507412482505555054690304.0, -1507412482505555054690304.0,
+ -1507412482505555054690304.0, -1507412482505555054690304.0,
-1507412482505555054690304.0, -1507412482505555054690304.0,
+ -1507412482505555054690304.0, -1507412482505555054690304.0,
-1507412482505555054690304.0, -1507412482505555054690304.0,
+ },
+ { /* output */
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ },
+ { /* expect */
+ 98789784453484056064183762944.0, 0, 0, 0,
+ 98789784453484056064183762944.0, 0, 0, 0,
+ 98789784453484056064183762944.0, 0, 0, 0,
+ 98789784453484056064183762944.0, 0, 0, 0,
+ -1507412482505555054690304.0, 0, 0, 0,
+ -1507412482505555054690304.0, 0, 0, 0,
+ -1507412482505555054690304.0, 0, 0, 0,
+ -1507412482505555054690304.0, 0, 0, 0,
+ },
+ },
+};
+
+#endif
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st_run.h
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st_run.h
new file mode 100644
index 00000000000..2549dad103d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st_run.h
@@ -0,0 +1,27 @@
+#ifndef HAVE_DEFINE_STRIDED_LD_ST_H
+#define HAVE_DEFINE_STRIDED_LD_ST_H
+
+int
+main ()
+{
+ unsigned i, k;
+
+ for (i = 0; i < sizeof (DATA) / sizeof (DATA[0]); i++)
+ {
+ T stride = DATA[i][0][0];
+ T *in = DATA[i][1];
+ T *out = DATA[i][2];
+ T *expect = DATA[i][3];
+
+ RUN_STRIDED_LD_ST (out, in, stride, N / stride);
+
+ for (k = 0; k < N; k = k + stride)
+ if (out[k] != expect[k])
+ __builtin_abort ();
+ }
+
+ return 0;
+}
+
+#endif
+
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp
b/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp
index 8c4e916d5b1..12002dd51bf 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp
+++ b/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp
@@ -120,6 +120,8 @@ set AUTOVEC_TEST_OPTS [list \
foreach op $AUTOVEC_TEST_OPTS {
dg-runtest [lsort [glob -nocomplain
$srcdir/$subdir/autovec/gather-scatter/*.\[cS\]]] \
"" "$op"
+ dg-runtest [lsort [glob -nocomplain
$srcdir/$subdir/autovec/strided/*.\[cS\]]] \
+ "" "$op"
}
# All done.
--
2.43.0
