On 8/18/24 10:40 AM, Jeff Law wrote:
After the discussion from last week, I'm leaning a bit more towards no
than before.
Let's take a simpler case, the meaning of:
(subreg:DI (reg:SI 1) 0)
Actually refers to d0, not d1 on the m68k. If we agree on that, then
(subreg:DI (reg:SI 0) 0)
Logically makes no sense since we can't reference register -1.
Note that Georg has a roughly similar looking issue on the avr, but at
the high end of the register file (little endian target) which would
roughly correspond to the discussion we had last week about paradoxicals
on little endian targets.
In both cases I'm thinking now that the problem is really a failure to
properly define HARD_REGNO_MODE_OK, particularly around boundary
conditions where the multi-reg mode either can't be represented or
crosses into other physical registers that have fixed uses.
The alternative is to consider that subreg expression after IRA and that
reload/LRA is expected to clean it up. It's a legitimate argument and
in some ways reload is already expecting to do this cleanup.
jeff
