On 8/1/24 2:16 PM, Raphael Zinsly wrote:
On Thu, Aug 1, 2024 at 3:40 PM Jeff Law <jeffreya...@gmail.com> wrote:
On 8/1/24 6:01 AM, Raphael Moreira Zinsly wrote:
+/* Both prologue temp registers are used in the vector probe loop for when
+ stack-clash protection is enabled, so we need to copy SP to a new register
+ and set it as CFA during the loop, we are using T3 for that. */
+#define RISCV_STACK_CLASH_VECTOR_CFA_REGNUM (GP_TEMP_FIRST + 23)
"23" looks like a typo. Shouldn't it be "3"?
GP_TEMP_FIRST + 3 = 8, which is s0/fp.
t3 is register 28.
I'd forgotten the temps are a disjoint set, sorry about goofing that up.
The series is OK for the trunk. IT's been a long road....
jeff
